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NEC Corp.
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| Part No. |
UPD98409GN-LMU
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| OCR Text |
sar controller 1997, 1998 ? document no. s12775ej2v0ds00 (2nd edition) date published may 1998 n cp(k) printed in japan data sheet the mark shows major revised points. description the m pd98409 (neascot-s40c tm ) is a high-perform... |
| Description |
ATM LIGHT sar CONTROLLER
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| File Size |
400.94K /
36 Page |
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Analog Devices, Inc.
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| Part No. |
AD7621 AD7621ASTRL AD7621ACP AD7621ACPRL
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| OCR Text |
...ssing codes no pipeline delay ( sar architecture ) differential input range: v ref (v ref up to 2.5v) throughput: 3 msps (wideband warp and warp mode) 2 msps (normal mode) 1.25 msps (impulse mode) inl: 1 lsb max ( 0.0015% of full-sca... |
| Description |
16-Bit, 1 LSB INL, 3 MSPS Pulsar ADC 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PQFP48
16-Bit, 1 LSB INL, 3 MSPS Pulsar ADC 16位，1 LSB INL MSPSPulsar系列ADC
16-Bit/ 1 LSB INL/ 3 MSPS Pulsar ADC
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| File Size |
264.90K /
26 Page |
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Analog Devices, Inc.
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| Part No. |
AD7689 AD7682 ADA4841-X AD7699
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| OCR Text |
...y indicator no pipeline delay, sar architecture single-supply 2.7v C 5.5 v operation with 1.8 v to 5 v logic interface serial interface spi?/qspi?/microwire?/dsp compatible power dissipation: 6 mw @ 5 v/100 ksps standby current: 1 n... |
| Description |
16-Bit, 8-Channel, 250 kSPS PulsarADC. 16位，8通道250 kSPS的Pulsar系列㈢ADC的
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| File Size |
2,032.92K /
20 Page |
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IDT
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| Part No. |
IDT77V106
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| OCR Text |
...o an atm layer device such as a sar or a switch asic. the idt77v106l25 also operates at 51.2 mbps and is well suited to back-plane driving applications. the 77v106l25 utilizes an 8-bit utopia interface on the cell side. the idt77v106l25 is ... |
| Description |
3.3 volt ATM PHY for 25.6 and 51.2 Mbps Applications with TC and PMD
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| File Size |
256.43K /
27 Page |
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Integrated Device Technology, Inc.
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| Part No. |
89TTM553 89TSF552BL 89TTM552BL 89TTM553BL 89TSF553B
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| OCR Text |
...tion and reassembly (aal-5 cpcs sar) in the datapath. 32-bit processor interface running at up to 66 mhz with integrated aal-5 sar and dma engine for data insertion and extraction. ? four classes of service. ? integrated aal-5-compliant ... |
| Description |
Traffic Manager Co-processor SPECIALTY MICROPROCESSOR CIRCUIT, PBGA960
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| File Size |
179.79K /
30 Page |
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it Online |
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