| PART |
Description |
Maker |
| CY7C1250V18-300BZI CY7C1246V18-333BZI CY7C1246V18- |
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 36兆位的DDR - II SRAM2字突发架构（2.0周期读写延迟
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 1M X 36 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| CY7C1170V18-300BZXI CY7C1170V18-300BZC CY7C1170V18 |
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 9 DDR SRAM, 0.45 ns, PBGA165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 512K X 36 DDR SRAM, 0.45 ns, PBGA165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 1M X 18 DDR SRAM, 0.45 ns, PBGA165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 8 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| CY7C1168V18-400BZXC CY7C1168V18-375BZXC CY7C1168V1 |
1M X 18 DDR SRAM, 0.45 ns, PBGA165 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 1M X 18 DDR SRAM, 0.45 ns, PBGA165
2M X 8 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| CY7C1150V18-333BZC CY7C1150V18-333BZI CY7C1150V18- |
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
|
Cypress Semiconductor
|
| CY7C11661KV18 CY7C11681KV18 CY7C11681KV18-400BZC C |
18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress Semiconductor
|
| CY7C1568V18 CY7C1568V18-300BZC CY7C1568V18-300BZI |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress Semiconductor
|
| CY7C1557V18-300BZI CY7C1557V18-300BZXC CY7C1557V18 |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
|
Cypress Semiconductor
|
| CY7C1150V18 CY7C1146V18-333BZXC CY7C1146V18-375BZX |
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
|
Cypress Semiconductor
|
| RMQCHA3636DGBA-15 |
36-Mbit DDR?II SRAM 2-word Burst Architecture (2.0 Cycle Read latency)
|
Renesas Electronics Corporation
|
| CY7C1568KV18-550BZXC |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C21701KV18 CY7C21701KV18-400BZXC |
18-Mbit DDR II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) with ODT
|
Cypress Semiconductor
|
