PART |
Description |
Maker |
ISPLSI2128E-100LT176 ISPLSI2128E-135LT176 ISPLSI21 |
In-SystemProgrammableSuperFASTHighDensityPLD In-System Programmable SuperFASTHigh Density PLD EE PLD, 7.5 ns, PQFP176 In-System Programmable SuperFAST High Density PLD In-System Programmable SuperFAST⑩ High Density PLD In-System Programmable SuperFAST?/a> High Density PLD
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Lattice Semiconductor, Corp. Lattice Semiconductor Corporation LATTICE[Lattice Semiconductor]
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WP06R WP06R12D05 WP06R12D12 WP06R12D15 WP06R12S05 |
High Density 5-6 Watt Wide Input Range DC/DC Converter 5-6 WATT HIGH DENSITY, WIDE INPUT RANGE DC/DC CONVERTER 5-6 WATT HIGH DENSITY/ WIDE INPUT RANGE DC/DC CONVERTER RECTIFIER SCHOTTKY SINGLE 2A 40V 50A-Ifsm 0.55Vf 0.5A-IR PowerDI-123 3K/REEL
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CANDD[C&D Technologies]
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ISPLSI1016EA ISPLSI1016EA-100LJ44 ISPLSI1016EA-100 |
125 MHz in-system prommable high density PLD 100 MHz in-system prommable high density PLD In-System Programmable High Density PLD 200 MHz in-system prommable high density PLD
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Lattice Semiconductor
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HDSOLDERCUP HDVERTICAL 780-M26-113R051 780-MYY-113 |
MALE-HIGH DENSITY MALE-HIGH DENSITY-MACHINED CONTACTS-VERTICAL
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List of Unclassifed Manufacturers List of Unclassifed Man...
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ISP844X ISP824 ISP814 ISP824X ISP814X IS814 IS824 |
6V, 50mA hihg density AC input phototransistor optically coupled isolator HIGH DENSITY A.C. INPUT PHOTOTRANSISTOR OPTICALLY COUPLED ISOLATORS 高密度交流输入光电晶体管的光耦合隔离 RES 18K 1/10W 5% 0805 TF
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Electronic Theatre Controls, Inc. List of Unclassifed Manufacturers ISOCOM
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ISPLSI2064V-100LJ84 ISPLSI2064V-100LJ84I ISPLSI206 |
3.3V High Density Programmable Logic 3.3V High Density Programmable Logic 3.3高密度可编程逻辑 3.3V High Density Programmable Logic EE PLD, 15 ns, PQCC84
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Lattice Semiconductor Corporation Lattice Semiconductor, Corp.
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SMB10J6.0 SMB10J6.0A SMB10J6.5 SMB10J6.5A SMB8J8.0 |
High Power Density Surface Mount TRANSZORB㈢ Transient Voltage Suppressors High Power Density Surface Mount TRANSZORB垄莽 Transient Voltage Suppressors High Power Density Surface Mount TRANSZORB庐 Transient Voltage Suppressors High Power Density Surface Mount TRANSZORB? Transient Voltage Suppressors
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Vishay Siliconix http://
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ISOPAC01 ISOPAC0103 ISOPAC0104 ISOPAC0111 ISOPAC01 |
High Current High density Isolated Silicon Power Rectifier(????靛?600V锛?ぇ?垫?锛??瀵?害锛??绂诲?锛??????存??? High Current High density Isolated Silicon Power Rectifier(????靛?1000V锛?ぇ?垫?锛??瀵?害锛??绂诲?纭?????娴??) High-Current Isolated Rectifier Assemblies. 150 V-1000 V. 10 nS - 2 microseconds 大电流隔离整流器大会150 V000五,10纳秒- 2微秒 HIGH CURRENT ISOLATED RECTIFIER ASSEMBLY High Current High density Isolated Silicon Power Rectifier(????靛?1000V锛?ぇ?垫?锛??瀵?害锛??绂诲?锛??????存???
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International Rectifier, Corp. Semtech Corporation
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QL2005 QL2005-1PQ208I QL2005-1PQ208C |
3.3V and 5.0V pASIC 2 FPGA combining speed, density, low cost and flexibility. 3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility(高速,高可用密度,低成本、可适应性强.3V.0V pASIC 2系列场可编程逻辑器件) 3.3V and 5.0V pASICò 2 FPGA
3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility(楂??锛?????瀵?害锛????????????у己??.3V??.0V pASIC 2绯诲??哄?缂???昏??ㄤ欢)
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QuickLogic Corp.
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ISPLSI5256VA ISPLSI5256VA-70LB208 ISPLSI5256VA-70L |
In-System Programmable 3.3V SuperWIDE?/a> High Density PLD In-System Programmable 3.3V SuperWIDE??High Density PLD In-System Programmable 3.3V SuperWIDEHigh Density PLD
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Lattice Semiconductor Corporation
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M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V 18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机 Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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Renesas Electronics Corporation. Renesas Electronics, Corp.
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ISPLSI5512VE-155LF256 ISPLSI5512VE-155LB272 ISPLSI |
In-system programmable 3.3V SuperWIDE high density PLD. fmax 155 MHz, tpd 6.5 ns. In-system programmable 3.3V SuperWIDE high density PLD. fmax 125 MHz, tpd 7.5 ns. EE PLD, 10 ns, PBGA388 In-system programmable 3.3V SuperWIDE high density PLD. fmax 100 MHz, tpd 10 ns. In-system programmable 3.3V SuperWIDE high density PLD. fmax 80 MHz, tpd 12 ns.
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LATTICE SEMICONDUCTOR CORP
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