rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a adg721/adg722/adg723 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 1998 cmos low voltage 4 v dual spst switches functional block diagrams adg721 in1 d2 s2 s1 d1 in2 adg722 in1 d2 s2 s1 d1 in2 adg723 in1 d2 s2 s1 d1 in2 switches shown for a logic "0" input features +1.8 v to +5.5 v single supply 4 v (max) on resistance low on-resistance flatness C3 db bandwidth >200 mhz rail-to-rail operation 8-lead m soic package fast switching times t on 20 ns t off 10 ns low power consumption (<0.1 m w) ttl/cmos compatible applications battery powered systems communication systems sample hold systems audio signal routing video switching mechanical reed relay replacement general description the a dg721, adg722 and adg723 are monolithic cmos spst switches. these switches are designed on an advanced submicron process that provides low power dissipation yet gives high switching speed, low on resistance and low leakage currents. the adg721, adg722 and adg723 are designed to operate from a single +1.8 v to +5.5 v supply, making them ideal for use in battery powered instruments and with the new generation of dacs and adcs from analog devices. the adg721, adg722 and adg723 contain two independent single-pole/single-throw (spst) switches. the adg721 and adg722 differ only in that both switches are normally open and normally closed respectively. while in the adg723, switch 1 is normally open and switch 2 is normally closed. each switch of the adg721, adg722 and adg723 conducts equally well in both directions when on. the adg723 exhibits break-before-make switching action. product highlights 1. +1.8 v to +5.5 v single supply operation. the adg721, adg722 and adg723 offers high performance, including low on resistance and fast switching times and is fully speci- fied and guaranteed with +3 v and +5 v supply rails. 2. very low r on (4 w max at 5 v, 10 w max at 3 v). at 1.8 v operation, r on is typically 40 w over the temperature range. 3. low on-resistance flatness. 4. C3 db bandwidth >200 mhz. 5. low power dissipation. cmos construction ensures low power dissipation. 6. fast t on /t off. 7. 8-lead m soic.
C2C rev. 0 adg721/adg722/adg723Cspecifications 1 b version C40 8 c to parameter +25 8 c +85 8 c units test conditions/comments analog switch analog signal range 0 v to v dd v on resistance (r on )45 w max v s = 0 v to v dd , i s = C10 ma, test circuit 1 on resistance match between channels ( d r on ) 0.3 w typ v s = 0 v to v dd , i s = C10 ma 1.0 w max on-resistance flatness (r flat(on) ) 0.85 w typ v s = 0 v to v dd , i s = C10 ma 1.5 w max leakage currents v dd = +5.5 v source off leakage i s (off) 0.01 na typ v s = 4.5 v/1 v, v d = 1 v/4.5 v 0.25 0.35 na max test circuit 2 drain off leakage i d (off) 0.01 na typ v s = 4.5 v/1 v, v d = 1 v/4.5 v 0.25 0.35 na max test circuit 2 channel on leakage i d , i s (on) 0.01 na typ v s = v d = 1 v, or v s = v d = 4.5 v 0.25 0.35 na max test circuit 3 digital inputs input high voltage, v inh 2.4 v min input low voltage, v inl 0.8 v max input current i inl or i inh 0.005 m a typ v in = v inl or v inh 0.1 m a max dynamic characteristics 2 t on 14 ns typ r l = 300 w , c l = 35 pf 20 ns max v s = 3 v, test circuit 4 t off 6 ns typ r l = 300 w , c l = 35 pf 10 ns max v s = 3 v, test circuit 4 break-before-make time delay, t d 7 ns typ r l = 300 w , c l = 35 pf, (adg723 only) 1 ns min v s1 = v s2 = 3 v, test circuit 5 charge injection 2 pc typ v s = 2 v; r s = 0 w , c l = 1 nf, test circuit 6 off isolation C60 db typ r l = 50 w , c l = 5 pf, f = 10 mhz C80 db typ r l = 50 w , c l = 5 pf, f = 1 mhz, test circuit 7 channel-to-channel crosstalk C77 db typ r l = 50 w , c l = 5 pf, f = 10 mhz C97 db typ r l = 50 w , c l = 5 pf, f = 1 mhz, test circuit 8 bandwidth C3 db 200 mhz typ r l = 50 w , c l = 5 pf, test circuit 9 c s (off) 7 pf typ c d (off) 7 pf typ c d , c s (on) 18 pf typ power requirements v dd = +5.5 v digital inputs = 0 v or 5 v i dd 0.001 m a typ 1.0 m a max notes 1 temperature ranges are as follows: b version, C40 c to +85 c. 2 guaranteed by design, not subject to production test. specifications subject to change without notice. (v dd = +5 v 6 10%, gnd = 0 v. all specifications C40 8 c to +85 8 c, unless otherwise noted.)
C3C rev. 0 adg721/adg722/adg723 (v dd = +3 v 6 10%, gnd = 0 v. all specifications C40 8 c to +85 8 c, unless otherwise noted.) specifications 1 b version C40 8 c to parameter +25 8 c +85 8 c units test conditions/comments analog switch analog signal range 0 v to v dd v on resistance (r on ) 6.5 w typ v s = 0 v to v dd , i s = C10 ma 10 w max test circuit 1 on resistance match between channels ( d r on ) 0.3 w typ v s = 0 v to v dd , i s = C10 ma 1.0 w max on-resistance flatness (r flat(on) ) 3.5 w typ v s = 0 v to v dd , i s = C10 ma leakage currents v dd = +3.3 v source off leakage i s (off) 0.01 na typ v s = 3 v/1 v, v d = 1 v/3 v 0.25 0.35 na max test circuit 2 drain off leakage i d (off) 0.01 na typ v s = 3 v/1 v, v d = 1 v/3 v 0.25 0.35 na max test circuit 2 channel on leakage i d , i s (on) 0.01 na typ v s = v d = 1 v, or 3 v 0.25 0.35 na max test circuit 3 digital inputs input high voltage, v inh 2.0 v min input low voltage, v inl 0.4 v max input current i inl or i inh 0.005 m a typ v in = v inl or v inh 0.1 m a max dynamic characteristics 2 t on 16 ns typ r l = 300 w , c l = 35 pf 24 ns max v s = 2 v, test circuit 4 t off 7 ns typ r l = 300 w , c l = 35 pf 11 ns max v s = 2 v, test circuit 4 break-before-make time delay, t d 7 ns typ r l = 300 w , c l = 35 pf, (adg723 only) 1 ns min v s1 = v s2 = 2 v, test circuit 5 charge injection 2 pc typ v s = 1.5 v; r s = 0 w , c l = 1 nf, test circuit 6 off isolation C60 db typ r l = 50 w , c l = 5 pf, f = 10 mhz C80 db typ r l = 50 w , c l = 5 pf, f = 1 mhz, test circuit 7 channel-to-channel crosstalk C77 db typ r l = 50 w , c l = 5 pf, f = 10 mhz C97 db typ r l = 50 w , c l = 5 pf, f = 1 mhz, test circuit 8 bandwidth C3 db 200 mhz typ r l = 50 w , c l = 5 pf, test circuit 9 c s (off) 7 pf typ c d (off) 7 pf typ c d , c s (on) 18 pf typ power requirements v dd = +3.3 v digital inputs = 0 v or 3 v i dd 0.001 m a typ 1.0 m a max notes 1 temperature ranges are as follows: b version, C40 c to +85 c. 2 guaranteed by design, not subject to production test. specifications subject to change without notice.
adg721/adg722/adg723 C4C rev. 0 ordering guide model temperature range brand* package description package option adg721brm C40 c to +85 c s6b m soic rm-8 adg722brm C40 c to +85 c s7b m soic rm-8 adg723brm C40 c to +85 c s8b m soic rm-8 *brand = due to package size limitations, these three characters represent the part number. pin configuration 8-lead m soic (rm-8) top view (not to scale) 8 7 6 5 1 2 3 4 s1 d1 in2 gnd v dd in1 d2 s2 adg721/ 722/723 table i. truth table (adg721/adg722) adg721 in adg722 in switch condition 0 1 off 10on table ii. truth table (adg723) logic switch 1 switch 2 0 off on 1 on off caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the adg721/adg722/adg723 features proprietary esd protection circuitry, per- manent damage may occur on devices subjected to high energy electrostatic discharges. there- fore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device absolute maximum ratings 1 (t a = +25 c unless otherwise noted) v dd to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to +7 v analog, digital inputs 2 . . . . . . . . . . . C0.3 v to v dd + 0.3 v or 30 ma, whichever occurs first continuous current, s or d . . . . . . . . . . . . . . . . . . . . . 30 ma operating temperature range industrial (b version) . . . . . . . . . . . . . . . . . C40 c to +85 c storage temperature range . . . . . . . . . . . . . C65 c to +150 c junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150 c m soic package, power dissipation . . . . . . . . . . . . . . . 450 mw q ja thermal impedance . . . . . . . . . . . . . . . . . . . . . 206 c/w q jc thermal impedance . . . . . . . . . . . . . . . . . . . . . . 44 c/w lead temperature, soldering vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220 c esd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kv notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating condi- tions for extended periods may affect device reliability. only one absolute maxi- mum rating may be applied at any one time. 2 overvoltages at in, s or d will be clamped by internal diodes. current should be limited to the maximum ratings given. terminology v dd most positive power supply potential. gnd ground (0 v) reference. s source terminal. may be an input or output. d drain terminal. may be an input or output. in logic control input. r on ohmic resistance between d and s. d r on on resistance match between any two channels i.e., r on max C r on min. r flat(on) flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. i s (off) source leakage current with the switch off. i d (off) drain leakage current with the switch off. i d , i s (on) channel leakage current with the switch on. v d (v s ) analog voltage on terminals d, s. c s (off) off switch source capacitance. c d (off) off switch drain capacitance. c d , c s (on) on switch capacitance. t on delay between applying the digital control input and the output switching on. t off delay between applying the digital control input and the output switching off. t d off time or on time measured between the 90% points of both switches, when switching from one address state to another. (adg723 only) crosstalk a measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance. off isolation a measure of unwanted signal coupling through an off switch. charge a measure of the glitch impulse transferred injection during switching.
adg721/adg722/adg723 C5C rev. 0 v d or v s C drain or source voltage C v 5.0 0 0.5 r on C v 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 t a = +25 8 c v dd = +2.7v v dd = +3.0v v dd = +4.5v v dd = +5.0v 5.5 6.0 figure 1. on resistance as a function of v d (v s ) single supplies v d or v s C drain or source voltage C v 6.0 0 0.5 r on C v 5.0 4.0 3.0 2.0 1.0 0 1.0 1.5 2.0 2.5 3.0 v dd = +3v +25 8 c C40 8 c +85 8 c figure 2. on resistance as a function of v d (v s ) for different temperatures v dd = +3 v v d or v s C drain or source voltage C v 0 0.5 r on C v 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v dd = +5v +25 8 c C40 8 c +85 8 c 6.0 5.5 5.0 4.5 figure 3. on resistance as a function of v d (v s ) for different temperatures v dd = +5 v frequency C hz 1m 10 1m i supply C a 100 1k 10k 100k 100 m 10 m 1 m 100n 10n 1n 10m v dd = +5v figure 4. supply current vs. input switching frequency frequency C hz C30 1m off isolation C db 10k 100k C40 C50 C60 C70 C80 C90 10m 100m C100 v dd = +3v, +5v figure 5. off isolation vs. frequency frequency C hz C30 1m crosstalk C db 10k 100k C40 C50 C60 C70 C80 C90 10m 100m C100 C110 v dd = +3v, +5v figure 6. crosstalk vs. frequency typical performance characteristicsC
adg721/adg722/adg723 C6C rev. 0 C6 on response C db C7 C8 C9 C10 C11 C12 frequency C hz 1m 100 1k 10k 100k 10m 100m v dd = +5v figure 7. on response vs. frequency i ds v1 sd v s r on = v1/i ds test circuit 1. on resistance test circuits sd v s a a v d i s (off) i d (off) test circuit 2. off leakage sd v s a v d i d (on) test circuit 3. on leakage 0.1 m f v s in sd v dd gnd r l 300 v c l 35pf v out v dd adg721 adg722 v in v in v out t on t off 50% 50% 90% 90% 50% 50% test circuit 4. switching times s1 d1 0.1 m f v dd in1, in2 v s1 gnd r l1 300 v c l1 35pf v out1 v s2 v out2 r l2 300 v c l2 35pf s2 v in d2 v dd t d t d 50% 50% 90% v in v out1 v out2 90% 90% 90% 0v 0v 0v test circuit 5. break-before-make time delay, t d (adg723 only)
adg721/adg722/adg723 C7C rev. 0 sd v dd in v s gnd c l 1nf v out r s v dd sw on v in v out d v out q inj = c l 3 d v out sw off test circuit 6. charge injection sd 0.1 m f v dd in v s gnd r l 50 v v out v in v dd test circuit 7. off isolation sd 0.1 m f v dd v s gnd 50 v v out v in1 v in2 r l 50 v nc channel-to-channel crosstalk = 20 3 log v s /v out v dd sd test circuit 8. channel-to-channel crosstalk sd 0.1 m f v dd in v s gnd r l 50 v v out v in v dd test circuit 9. bandwidth
adg721/adg722/adg723 C8C rev. 0 c3294C8C4/98 printed in u.s.a. applications information the adg721/adg722/adg723 belongs to analog devices new family of cmos switches. this series of general purpose switches have improved switching times, lower on resistance, higher bandwidths, low power consumption and low leakage currents. adg721/adg722/adg723 supply voltages functionality of the adg721/adg722/adg723 extends from +1.8 v to +5.5 v single supply, which makes it ideal for battery powered instruments, where important design parameters are power efficiency and performance. it is important to note that the supply voltage effects the input signal range, the on resistance and the switching times of the part. by taking a look at the typical performance characteristics and the specifications, the effects of the power supplies can be clearly seen. for v dd = +1.8 v, on resistance is typically 40 w over the tem- perature range. on response vs. frequency figure 8 illustrates the parasitic components that affect the ac performance of cmos switches (the switch is shown surrounded by a box). additional external capacitances will further degrade some performance. these capacitances affect feedthrough, crosstalk and s ystem bandwidth. c ds s v in c d c load r load d v out r on figure 8. switch represented by equivalent parasitic components the transfer function that describes the equivalent diagram of the switch (figure 8) is of the form (a)s shown below. a ( s ) = r t s ( r on c ds ) + 1 s ( r on c t r t ) + 1 ? ? where: c t = c load + c d + c ds r t = r load / (r load + r on ) the signal transfer characteristic is dependent on the switch channel capacitance, c ds . this capacitance creates a frequency zero in the numerator of the transfer function a(s). because the switch on resistance is small, this zero usually occurs at high frequencies. the bandwidth is a function of the switch output capacitance combined with c ds and the load capacitance. the frequency pole corresponding to these capacitances appears in the denominator of a(s). the dominant effect of the output capacitance, c d , causes the pole breakpoint frequency to occur first. therefore, in order to maximize bandwidth a switch must have a low input and output capacitance and low on resistance. the on response vs. frequency plot for the adg721/adg722/adg723 can be seen in figure 7. off isolation off isolation is a measure of the input signal coupled through an off switch to the switch output. the capacitance, c ds , couples the input signal to the output load, when the switch is off as shown in figure 9. c ds s v in c d c load r load d v out figure 9. off isolation is affected by external load resis- tance and capacitance the larger the value of c ds , larger values of feedthrough will be produced. the typical performance characteristic graph of fig- ure 5 illustrates the drop in off isolation as a function of fre- quency. from dc to roughly 1 mhz, the switch shows better than C80 db isolation. up to frequencies of 10 mhz, the off isolation remains better than C60 db. as the frequency in creases, more and more of the input signal is coupled through to the output. off isolation can be maximized by choosing a switch with the smallest c ds as possible. the values of load resistance and capacitance also affect off isolation, as they contribute to the coefficients of the poles and zeros in the transfer function of the switch when open. a ( s ) = s ( r load c ds ) s ( r load )( c load + c d + c ds ) + 1 ? ? outline dimensions dimensions shown in inches and (mm). 8-lead m soic (rm-8) 8 5 4 1 0.122 (3.10) 0.114 (2.90) 0.199 (5.05) 0.187 (4.75) pin 1 0.0256 (0.65) bsc 0.122 (3.10) 0.114 (2.90) seating plane 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) 0.008 (0.20) 0.043 (1.09) 0.037 (0.94) 0.120 (3.05) 0.112 (2.84) 0.011 (0.28) 0.003 (0.08) 0.028 (0.71) 0.016 (0.41) 33 27 0.120 (3.05) 0.112 (2.84)
package/price information 4 ohm, low voltage dual spst (2nc) switch on 8-ld usoic * this price is provided for budgetary purposes as recommended list price in u.s. dollars per unit in the stated volume. pricing displayed for evaluation boards and kits is based on 1-piece pricing. view pricing and availability for further information. model status package description pin count temperature range price* (100-499) adg721bm-reel pre-release micro soic 8 commercial - adg721brm production micro soic 8 industrial $.77 adg721brm-reel production micro soic 8 industrial - adg721brm-reel7 production micro soic 8 industrial -
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