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Renesas Electronics Corporation. Renesas Electronics, Corp.
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Part No. |
m38230G4-XXXFP m38230G4-XXXHP m38231G4-XXXHP m38232G4-XXXFP m38232G4-XXXHP m38233G4-XXXFP m38233G4-XXXHP m38234G4-XXXFP m38234G4-XXXHP m38235G4-XXXFP m38230G6-XXXFP m38230G6-XXXHP m38231G6-XXXFP m38231G6-XXXHP m38232G6-XXXFP m38232G6-XXXHP m38233G6-XXXFP m38233G6-XXXHP m38234G6-XXXFP m38234G6-XXXHP m38235G6-XXXFP m38235G6-XXXHP m38236G6-XXXHP m38237G6-XXXFP m38237G6-XXXHP m38238G6-XXXFP m38230G7-XXXFP m38230G7-XXXHP m38231G7-XXXFP m38231G7-XXXHP m38232G7-XXXFP m38232G7-XXXHP m38233G7-XXXFP m38233G7-XXXHP m38234G7-XXXFP m38234G7-XXXHP m38235G7-XXXFP m38235G7-XXXHP m38236G7-XXXFP m38236G7-XXXHP m38237G7-XXXFP m38237G7-XXXHP m38238G7-XXXFP m38238G7-XXXHP m38239G7-XXXFP m38239G7-XXXHP m38230G8-XXXFP m38230G8-XXXHP m38231G8-XXXFP m38231G8-XXXHP m38232G8-XXXFP m38232G8-XXXHP m38233G8-XXXFP m38233G8-XXXHP m38234G8-XXXFP m38234G8-XXXHP m38235G8-XXXFP m38235G8-XXXHP m38236G8-XXXFP m38236G8-XXXHP m38237G8-XXXFP m38237G8-XXXHP m38238G8-XXXFP m38238G8-XXXHP m38230GA-XXXFP m38230GA-XXXHP m38231GA-XXXFP m38231GA-XXXHP m38232GA-XXXFP m38232GA-XXXHP m38233GA-XXXFP m38233GA-XXXHP m38234GA-XXXFP m38234GA-XXXHP m38235GA-XXXFP m38235GA-XXXHP m38236GA-XXXFP m38236GA-XXXHP m38237GA-XXXFP m38237GA-XXXHP
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Description |
18-mbit (512K x 36/1m x 18) Flow-Through SRAm; Architecture: Standard sync, Flow-through; Density: 18 mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V 36-mbit QDR(Tm)-II SRAm 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 mb; Organization: 2mb x 18; Vcc (V): 1.7 to 1.9 V 36-mbit DDR-II SRAm 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 mb; Organization: 1mb x 36; Vcc (V): 1.7 to 1.9 V 36-mbit (1m x 36/2m x 18/512K x 72) pipelined SRAm with NoBL(Tm) Architecture; Architecture: NoBL, Pipeline; Density: 36 mb; Organization: 1mb x 36; Vcc (V): 2.4 to 2.6 V 72-mbit (2m x 36/4m x 18/1m x 72) pipelined SRAm with NoBL(Tm) Architecture; Architecture: NoBL, Pipeline; Density: 72 mb; Organization: 2mb x 36; Vcc (V): 3.1 to 3.6 V 18-mbit (512K x 36/1m x 18) pipelined SRAm; Architecture: Standard sync, Pipeline SCD; Density: 18 mb; Organization: 1mb x 18; Vcc (V): 3.1 to 3.6 V 36-mbit (1m x 36/2m x 18/512K x 72) pipelined SRAm with NoBL(Tm) Architecture; Architecture: NoBL, Pipeline; Density: 36 mb; Organization: 1mb x 36; Vcc (V): 3.1 to 3.6 V 72-mbit QDR(Tm)-II SRAm 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 mb; Organization: 2mb x 36; Vcc (V): 1.7 to 1.9 V 18-mbit (512K x 36/1m x 18) Flow-Through SRAm; Architecture: Standard sync, Flow-through; Density: 18 mb; Organization: 1mb x 18; Vcc (V): 3.1 to 3.6 V 36-mbit QDR(Tm)-II SRAm 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 mb; Organization: 1mb x 36; Vcc (V): 1.7 to 1.9 V 36-mbit (1m x 36/2 m x 18/512K x 72) Flow-Through SRAm with NoBL(Tm) Architecture; Architecture: NoBL, Flow-through; Density: 36 mb; Organization: 1mb x 36; Vcc (V): 3.1 to 3.6 V 72-mbit(2m x 36/4m x 18/1m x 72) pipelined SRAm with NoBL(Tm) Architecture; Architecture: NoBL, Pipeline; Density: 72 mb; Organization: 1mb x 72; Vcc (V): 2.4 to 2.6 V 72-mbit QDR(Tm)-II SRAm 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 mb; Organization: 4mb x 18; Vcc (V): 1.7 to 1.9 V 36-mbit (1m x 36/2m x 18/512K x 72) pipelined sync SRAm; Architecture: Standard sync, Pipeline SCD; Density: 36 mb; Organization: 1mb x 36; Vcc (V): 3.1 to 3.6 V 36-mbit (1m x 36/2m x 18/512K x 72) pipelined SRAm with NoBL(Tm) Architecture; Architecture: NoBL, Pipeline; Density: 36 mb; Organization: 2mb x 18; Vcc (V): 3.1 to 3.6 V 36-mbit (1m x 36/2m x 18/512K x 72) pipelined SRAm with NoBL(Tm) Architecture; Architecture: NoBL, Pipeline; Density: 36 mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V 72-mbit DDR-II SRAm 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 mb; Organization: 4mb x 18; Vcc (V): 1.7 to 1.9 V sync SRAm; Architecture: QDR-II, 2 Word Burst; Density: 36 mb; Organization: 2mb x 18; Vcc (V): 1.7 to 1.9 V 36-mbit DDR-II SRAm 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 mb; Organization: 2mb x 18; Vcc (V): 1.7 to 1.9 V 72-mbit(2m x 36/4m x 18/1m x 72) pipelined SRAm with NoBL(Tm) Architecture; Architecture: NoBL, Pipeline; Density: 72 mb; Organization: 2mb x 36; Vcc (V): 2.4 to 2.6 V 72-mbit(2m x 36/4m x 18/1m x 72) pipelined SRAm with NoBL(Tm) Architecture; Architecture: NoBL, Pipeline; Density: 72 mb; Organization: 4mb x 18; Vcc (V): 2.4 to 2.6 V 72-mbit QDR(Tm)-II SRAm 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 mb; Organization: 4mb x 18; Vcc (V): 1.7 to 1.9 V 72-mbit (2m x 36/4m x 18/1m x 72) pipelined SRAm with NoBL(Tm) Architecture; Architecture: NoBL, Pipeline; Density: 72 mb; Organization: 1mb x 72; Vcc (V): 3.1 to 3.6 V 72-mbit (2m x 36/4m x 18/1m x 72) pipelined sync SRAm; Architecture: Standard sync, Pipeline SCD; Density: 72 mb; Organization: 2mb x 36; Vcc (V): 2.4 to 2.6 V 72-mbit QDR(Tm)-II SRAm 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 mb; Organization: 4mb x 18; Vcc (V): 1.7 to 1.9 V 72-mbit DDR-II SRAm 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 mb; Organization: 2mb x 36; Vcc (V): 1.7 to 1.9 V 36-mbit (1m x 36/2m x 18/512K x 72) pipelined sync SRAm; Architecture: Standard sync, Pipeline SCD; Density: 36 mb; Organization: 1mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CmOS微机 72-mbit DDR-II SRAm 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 mb; Organization: 4mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CmOS微机 18-mbit (512K x 36/1m x 18) Flow-Through SRAm; Architecture: Standard sync, Flow-through; Density: 18 mb; Organization: 1mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CmOS微机 SINGLE-CHIP 8-BIT CmOS mICROCOmPUTER 单芯位CmOS微机 72-mbit(2m x 36/4m x 18/1m x 72) pipelined SRAm with NoBL(Tm) Architecture; Architecture: NoBL, Pipeline; Density: 72 mb; Organization: 4mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CmOS微机 72-mbit(2m x 36/4m x 18/1m x 72) pipelined SRAm with NoBL(Tm) Architecture; Architecture: NoBL, Pipeline; Density: 72 mb; Organization: 2mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CmOS微机 72-mbit QDR(Tm)-II SRAm 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 mb; Organization: 2mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CmOS微机 72-mbit QDR(Tm)-II SRAm 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 mb; Organization: 2mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CmOS微机 36-mbit QDR(Tm)-II SRAm 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 mb; Organization: 2mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CmOS微机 SINGLE-CHIP 8-BIT CmOS mICROCOmPUTER 单芯8位CmOS微机 sync SRAm; Architecture: QDR-II, 2 Word Burst; Density: 36 mb; Organization: 2mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CmOS微机 36-mbit DDR-II SRAm 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 mb; Organization: 1mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CmOS微机 72-mbit DDR-II SRAm 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 mb; Organization: 2mb x 36; Vcc (V): 1.7 to 1.9 V 36-mbit QDR(Tm)-II SRAm 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 mb; Organization: 2mb x 18; Vcc (V): 1.7 to 1.9 V
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901.80K /
76 Page |
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