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  adjustable-edge-rate Datasheet PDF File

For adjustable-edge-rate Found Datasheets File :: 1625    Search Time::1.047ms    
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    MC145557 MC145557P MC145567DW MC145557DWNBSP MC145564 MC145567 MC145554 MC145557DW MC14555

MOTOROLA[Motorola, Inc]
Motorola Semiconductor Products Inc
MOTOROLA[Motorola Inc]
Part No. MC145557 MC145557P MC145567DW MC145557DWNBSP MC145564 MC145567 MC145554 MC145557DW MC14555
OCR Text ...push-pull power amplifiers with adjustable gain. These devices have an input operational amplifier whose output is the input to the encoder ...edge, a serial PCM word at D R is clocked by BCLK R into the receive data register. FS R also initia...
Description From old datasheet system
A-Law CODEC
PCM Codec-Filter

File Size 342.14K  /  20 Page

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    SMH4042 SMH4042G-AGM SMH4042G-AGN SMH4042G-AHM SMH4042G-AHN SMH4042G-AKM SMH4042G-AKN SMH4042G-ALM SMH4042G-ALN SMH4042G

SUMMIT[Summit Microelectronics, Inc.]
ETC
Part No. SMH4042 SMH4042G-AGM SMH4042G-AGN SMH4042G-AHM SMH4042G-AHN SMH4042G-AKM SMH4042G-AKN SMH4042G-ALM SMH4042G-ALN SMH4042G-BGM SMH4042G-BGN SMH4042G-BHM SMH4042G-BHN SMH4042G-BKM SMH4042G-BKN SMH4042G-BLM SMH4042G-BLN SMH4042S-AGM SMH4042S-AGN SMH4042S-AHM SMH4042S-AHN SMH4042S-AKM SMH4042S-AKN SMH4042S-ALM SMH4042S-ALN SMH4042S-BGM SMH4042S-BGN SMH4042S-BHM SMH4042S-BHN SMH4042S-BKM SMH4042S-BKN SMH4042S-BLM SMH4042S-BLN
OCR Text ... Reset Filtering - Soft Reset * Adjustable Power-on Slew Rate * Supports Mixed Voltage Cards Memory * Integrated 4K Bit 2-Wire - Data Downlo...Edge to Valid Output Data Out Hold Time SCL and SDA Rise Time SCL and SDA Fall Time Data In Setup Ti...
Description Hot Swap⑩ Controller
Hot Swap Controller

File Size 223.57K  /  28 Page

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    AD1376 AD1377KD AD1376JD AD1376KD AD1377 AD1377JD

AD[Analog Devices]
Part No. AD1376 AD1377KD AD1376JD AD1376KD AD1377 AD1377JD
OCR Text ...(AD1377) Short Cycle Capability Adjustable Clock Rate Parallel and Serial Outputs Low Power: 645 mW Typical (AD1376) 585 mW Typical (AD1377)...Edge Initiates Conversion 1 1 LS TTL Load 0.053 ( 0.2 max) 0.053 ( 0.1 max) 0.053 ( 0.2 max...
Description Complete, High Speed 16-Bit A/D Converters

File Size 147.73K  /  8 Page

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    AD977 AD977A AD977AAN AD977AAR AD977AARS AD977ABN AD977ABR AD977ABRS AD977ACN AD977ACR AD977ACRS AD977AN AD977AR AD977AR

AD[Analog Devices]
Part No. AD977 AD977A AD977AAN AD977AAR AD977AARS AD977ABN AD977ABR AD977ABRS AD977ACN AD977ACR AD977ACRS AD977AN AD977AR AD977ARS AD977BN AD977BR AD977BRS AD977CN AD977CR AD977CRS
OCR Text ...shown in Figures 11, 12 and 13. Adjustable to zero. Tested at room temperature. 4 Full-Scale Error is expressed as the % difference between ...Edge Delay Previous DATA Valid after CS, R/C Low BUSY to EXT. DATACLK Setup Time Final EXT. DATACLK ...
Description 16-Bit, 100 kSPS/200 kSPS BiCMOS A/D Converter

File Size 281.30K  /  24 Page

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    ADC-207 ADC-207LC ADC-207LM ADC-207LM-QL ADC-207MC ADC-207MM ADC-207MM-QL ADC-B208 ADC-B207

Datel
ETC[ETC]
List of Unclassifed Manufacturers
Electronic Theatre Controls, Inc.
http://
Part No. ADC-207 ADC-207LC ADC-207LM ADC-207LM-QL ADC-207MC ADC-207MM ADC-207MM-QL ADC-B208 ADC-B207
OCR Text ...0-step, 40 IRE NTSC ramp test. Adjustable using reference ladder midpoint tap. See ADC-207 Operation. + -15 Figure 2. Typical Connections for Using the ADC-207 2 (R) (R) ADC-207 OUTPUT CODING (+REFERENCE = +5.12V, -R...
Description 7- BIT 20MHZ CMOS FLASH A/D CONVERTERS 7 -0MHz的闪存的CMOS A / D转换

File Size 153.51K  /  6 Page

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    HI5812 HI5812JIB HI5812JIJ HI5812JIP HI5812KIB HI5812KIJ HI5812KIP FN3214

Intersil, Corp.
INTERSIL[Intersil Corporation]
Part No. HI5812 HI5812JIB HI5812JIJ HI5812JIP HI5812KIB HI5812KIJ HI5812KIP FN3214
OCR Text ...r, DNL J K J K Gain Error, FSE (Adjustable to Zero) Offset Error, VOS (Adjustable to Zero) Power Supply Rejection, PSRR Offset Error PSRR Ga...edge. (See text.) Three-State Enable for D0 D3. Active Low Input. Digital Positive Supply (+5V). CL...
Description CMOS 20 Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP24
CMOS 20 Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24
CMOS 20 Microsecond 12-Bit Sampling A/D Converter with Internal Track and Hold
From old datasheet system

File Size 425.96K  /  13 Page

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    MSM7702-01 MSM7702-02 MSM7702-03 MSM7702_01_02_03 MSM7702 MSM7702-01MS-K

OKI electronic componet...
OKI electronic components
OKI[OKI electronic componets]
OKI SEMICONDUCTOR CO., LTD.
Part No. MSM7702-01 MSM7702-02 MSM7702-03 MSM7702_01_02_03 MSM7702 MSM7702-01MS-K
OCR Text ...192/384/768/1536/1544/200 kHz * Adjustable transmit gain * Built-in reference voltage supply * Analog output can directly drive a load equiv...edge of the BCLK signal and latched into the internal register when shifted by eight bits. The start...
Description From old datasheet system
Single Rail CODEC

File Size 127.58K  /  17 Page

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    TDA9170

Philips Semiconductors
Part No. TDA9170
OCR Text ...al sandcastle reference with an adjustable window start and stop delay. The vertical window generator synchronizes on the falling edge of the first burst key/clamp key after a field pulse recognition. I2C-bus specification The I2C-bus is de...
Description YUV picture improvement processor based on histogram modification

File Size 320.04K  /  22 Page

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    AD53509 AD53509JSQ

AD[Analog Devices]
Part No. AD53509 AD53509JSQ
OCR Text ...buffered VCOM are independently adjustable. On-board Schottky diodes provide high speed switching and low capacitance. Also included on the ...Edge to Edge Rise and Fall Times 1 V Swing 3 V Swing 5 V Swing 9 V Swing Rise and Fall Time Temperat...
Description High-Performance Driver/Comparator Active Load on a Single Chip

File Size 105.12K  /  8 Page

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    AD808-622BR AD808-622BRRL AD808-622BRRL7 AD808

AD[Analog Devices]
Part No. AD808-622BR AD808-622BRRL AD808-622BRRL7 AD808
OCR Text ...l level has fallen below a user adjustable threshold. The threshold is set with a single external resistor. The signal level detect circuit ...edge and the optimum sampling instant, which is assumed to be halfway between the rising and falling...
Description Fiber Optic Receiver with Quantizer and Clock Recovery and Data Retiming

File Size 139.87K  /  12 Page

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For adjustable-edge-rate Found Datasheets File :: 1625    Search Time::1.047ms    
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