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| Part No. |
155
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| OCR Text |
...Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9043 generates ST-BUS clock and framing signals that are phase locke... |
| Description |
From old datasheet system
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| File Size |
397.91K /
30 Page |
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it Online |
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Connor-Winfield Corpora...
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| Part No. |
SCG4540
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| OCR Text |
phase locked output frequency control intrinsically low jitter crystal oscillator lvpecl outputs with disable function dual 10 khz input references lor & lol combined alarm output force free run function automatic free run opera... |
| Description |
Synchronous Clock Generators
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| File Size |
763.13K /
16 Page |
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| Part No. |
MPC9330
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| OCR Text |
...nable the outputs and close the phase locked loop, enabling the PLL to recover to normal operation. The MPC9330 output clock stop control allows the outputs to start and stop synchronously in the logic low state, without the potential gener... |
| Description |
From old datasheet system
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| File Size |
132.18K /
12 Page |
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| Part No. |
MPC93R51
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| OCR Text |
...PLL technology to frequency and phase lock its outputs onto an input reference clock. Normal operation of the MPC93R51 requires a connection...locked loop, also enabling the PLL to recover to normal operation. The MPC93R51 is 3.3V compatible a... |
| Description |
From old datasheet system
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| File Size |
150.16K /
12 Page |
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it Online |
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| Part No. |
1050
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| OCR Text |
...ng circuitry such as a complete phase-locked loop, filter tuning circuitry, signal and data buffering, and supply conditioning for ease of characterization. This manual provides complete instructions for using the EV kit. Separate sections ... |
| Description |
From old datasheet system
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| File Size |
241.94K /
17 Page |
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| Part No. |
MPC953
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| OCR Text |
... to minimize cycle-to-cycle and phase jitter.
MPC953
LOW VOLTAGE PLL CLOCK DRIVER
* * * * *
Fully Integrated PLL Output Frequenc...Locked) Input to Q Delay Part-to-Part Delay
tPLZ,HZ tPZL tjitter
Output Disable Time Output En... |
| Description |
From old datasheet system
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| File Size |
104.70K /
8 Page |
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it Online |
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...ulation better than 105% due to phase locked loop (pll)-bandwidth control at negative modulated standards vif automatic gain control (agc) detector for gain control, operating as peak sync detector tuner agc with adjustable takeover point... |
| Description |
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| File Size |
222.28K /
36 Page |
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| Part No. |
MPC961C
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| OCR Text |
... Time Propagation Delay (static phase offset) Output-to-Output Skewb Output Duty Cycle Output Rise/Fall Time Output Disable Time Output Enab...locked Condition
s)c RMS (1 s) RMS (1 s) s
15 7.0 10 15 10
a. AC characteristics apply for ... |
| Description |
From old datasheet system
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| File Size |
155.26K /
12 Page |
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it Online |
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