| Description |
CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9 4096 x 9 8192 x 9 and 16384 x 9r>rES,SMD,100,1%,0.063W,0603r>High-speed double diode - Cd max.: 1.5 pF; Configurar='#FF0000'>tion: dual c.c. ; IF max: 215 mA; IFSM max: 4 A; Ir max: 500@Vr=80V nA; IFrM: 500 mA; r='#FF0000'>trr max: 4 ns; VFmax: 1@IF=50mA mV; Vr max: 80 Vr>Schor='#FF0000'>tr='#FF0000'>tky barrier diode - Cd max.: 100@Vr=4V pF; Configurar='#FF0000'>tion: single ; IF: 1 A; IFSM max: 25 A; Ir max: 1@Vr=25V mA; VFmax: 450@IF=1A mV; Vr: 25 Vr>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9/ 4096 x 9/ 8192 x 9 and 16384 x 9r>r='#FF0000'>trenchmos (r='#FF0000'>tm) logic level FEr='#FF0000'>t - Configurar='#FF0000'>tion: Single N-channel ; I&lr='#FF0000'>t;sub&gr='#FF0000'>t;D&lr='#FF0000'>t;/sub&gr='#FF0000'>t; DC: 0.34 A; r&lr='#FF0000'>t;sub&gr='#FF0000'>t;DS(on)&lr='#FF0000'>t;/sub&gr='#FF0000'>t;: 3900@10V5300@4.5V mOhm; V&lr='#FF0000'>t;sub&gr='#FF0000'>t;DS&lr='#FF0000'>t;/sub&gr='#FF0000'>t;max: 60 V 异步FIFO的CMOS 2048 × 9096 × 9192 × 96384 × 9r>INSErr='#FF0000'>t, COAX FEMALE Sr='#FF0000'>trAIGHr='#FF0000'>tINSErr='#FF0000'>t, COAX FEMALE Sr='#FF0000'>trAIGHr='#FF0000'>t; Impedance:50r; Coaxial cable r='#FF0000'>type:rG174AU/rG188AU/rG316AU 16K X 9 Or='#FF0000'>tHEr FIFO, 50 ns, CDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 4K X 9 Or='#FF0000'>tHEr FIFO, 30 ns, CDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 异步FIFO的CMOS 2048 × 9096 × 9192 × 96384 × 9r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 16K X 9 Or='#FF0000'>tHEr FIFO, 50 ns, CQCC32r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 16K X 9 Or='#FF0000'>tHEr FIFO, 50 ns, PDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 16K X 9 Or='#FF0000'>tHEr FIFO, 50 ns, CDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 2K X 9 Or='#FF0000'>tHEr FIFO, 20 ns, PQCC32r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 8K X 9 Or='#FF0000'>tHEr FIFO, 50 ns, CDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 4K X 9 Or='#FF0000'>tHEr FIFO, 80 ns, CDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 4K X 9 Or='#FF0000'>tHEr FIFO, 80 ns, PDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 4K X 9 Or='#FF0000'>tHEr FIFO, 25 ns, CQCC32r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 8K X 9 Or='#FF0000'>tHEr FIFO, 20 ns, CDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 4K X 9 Or='#FF0000'>tHEr FIFO, 20 ns, CDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 8K X 9 Or='#FF0000'>tHEr FIFO, 50 ns, CQCC32r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 2K X 9 Or='#FF0000'>tHEr FIFO, 20 ns, CDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 2K X 9 Or='#FF0000'>tHEr FIFO, 20 ns, PDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 4K X 9 Or='#FF0000'>tHEr FIFO, 65 ns, PDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 4K X 9 Or='#FF0000'>tHEr FIFO, 65 ns, CDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 4K X 9 Or='#FF0000'>tHEr FIFO, 50 ns, CDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 2K X 9 Or='#FF0000'>tHEr FIFO, 50 ns, PQCC32r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 4K X 9 Or='#FF0000'>tHEr FIFO, 25 ns, PDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 4K X 9 Or='#FF0000'>tHEr FIFO, 50 ns, PQCC32r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 4K X 9 Or='#FF0000'>tHEr FIFO, 65 ns, CQCC32r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 2K X 9 Or='#FF0000'>tHEr FIFO, 65 ns, CQCC32r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 2K X 9 Or='#FF0000'>tHEr FIFO, 65 ns, PDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 2K X 9 Or='#FF0000'>tHEr FIFO, 80 ns, PDIP28r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 2K X 9 Or='#FF0000'>tHEr FIFO, 80 ns, CQCC32r>CMOS r='#FF0000'>asynchronous FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 2K X 9 Or='#FF0000'>tHEr FIFO, 80 ns, CDIP28r>
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