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  c2mos Datasheet PDF File

For c2mos Found Datasheets File :: 1600    Search Time::1.718ms    
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    74VHC273 74VHC273M 74VHC273T 6172

STMICROELECTRONICS[STMicroelectronics]
Part No. 74VHC273 74VHC273M 74VHC273T 6172
OCR Text ...e and double-layer metal wiring c2mos technology. PIN CONNECTION AND IEC LOGIC SYMBOLS October 1999 1/10 74VHC273 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2, 5, 6, 9, 12, 15, 16, 19 3, 4, 7, 8, 13, 14, 17, 18 11 SYMBO...
Description From old datasheet system
OCTAL D-TYPE FLIP FLOP WITH CLEAR

File Size 71.62K  /  10 Page

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    74VHC27 74VHC27M 74VHC27T

STMICROELECTRONICS[STMicroelectronics]
Part No. 74VHC27 74VHC27M 74VHC27T
OCR Text ...e and double-layer metal wiring c2mos technology. The internal circuit is composed of 3 stages PIN CONNECTION AND IEC LOGIC SYMBOLS June 1999 1/7 74VHC27 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 3, 9 2, 4, 10 13, 5, ...
Description TRIPLE 3-INPUT NOR GATE

File Size 50.02K  /  7 Page

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    74AC02 74AC02B 74AC02M 4693

STMICROELECTRONICS[STMicroelectronics]
Part No. 74AC02 74AC02B 74AC02M 4693
OCR Text ... CODES : 74AC02B 74AC02M wiring c2mos technology. It is ideal for low power applications mantaining high speed operation similar to equivalent Bipolar Schottky TTL. The internal circuit is composed of 3 stages including buffer output, which...
Description    QUAD 2-INPUT NOR GATE
From old datasheet system

File Size 67.05K  /  7 Page

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    74VHC573 74VHC573M 74VHC573T 6175

STMicroelectronics
Part No. 74VHC573 74VHC573M 74VHC573T 6175
OCR Text ...e and double-layer metal wiring c2mos technology. This 8 bit D-Type latch is controlled by a latch enable input (LE) and an output enable input (OE). While the LE input is held at a high level, the Q PIN CONNECTION AND IEC LOGIC SYMBOLS ...
Description OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
From old datasheet system

File Size 74.69K  /  10 Page

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    74VHC574 74VHC574M 74VHC574T

STMICROELECTRONICS[STMicroelectronics]
Part No. 74VHC574 74VHC574M 74VHC574T
OCR Text ...e and double-layer metal wiring c2mos technology. This 8 bit D-Type flip-flop is controlled by a clock input (CK) and an output enable input (OE). On the positive transition of the clock, the Q outputs will be set to logic states that were ...
Description OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING

File Size 74.55K  /  10 Page

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    74VHC594 M74VHC594RMTR M74VHC594TTR

ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
Part No. 74VHC594 M74VHC594RMTR M74VHC594TTR
OCR Text ...ed with sub-micron silicon gate c2mos technology. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks and direct overriding clear (SCLR, RCLR) are provided for bo...
Description 8 BIT SHIFT REGISTER WITH OUTPUT REGISTER

File Size 186.13K  /  14 Page

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    74VHC74 74VHC74M 74VHC74T 6178

意法半导
STMICROELECTRONICS[STMicroelectronics]
Part No. 74VHC74 74VHC74M 74VHC74T 6178
OCR Text ...e and double-layer metal wiring c2mos technology. A signal on the D INPUT is transfered to the Q OUTPUT during the positive going transition of the clock pulse. PIN CONNECTION AND IEC LOGIC SYMBOLS June 1999 1/10 74VHC74 INPUT ...
Description DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
From old datasheet system

File Size 74.12K  /  10 Page

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    74VHCT00 74VHCT00A 74VHCT00AM 74VHCT00AT 5817

STMICROELECTRONICS[STMicroelectronics]
Part No. 74VHCT00 74VHCT00A 74VHCT00AM 74VHCT00AT 5817
OCR Text ...e and double-layer metal wiring c2mos technology. PIN CONNECTION AND IEC LOGIC SYMBOLS August 1999 1/7 74VHCT00A INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 4, 9, 12 2, 5, 10, 13 3, 6, 8, 11 7 14 SYMBOL 1A to 4A 1B to 4...
Description From old datasheet system
QUAD 2-INPUT NAND GATE

File Size 52.04K  /  7 Page

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    74VHCT02 74VHCT02A 74VHCT02AM 74VHCT02AT 5818

STMICROELECTRONICS[STMicroelectronics]
Part No. 74VHCT02 74VHCT02A 74VHCT02AM 74VHCT02AT 5818
OCR Text ...e and double-layer metal wiring c2mos technology. PIN CONNECTION AND IEC LOGIC SYMBOLS August 1999 1/7 74VHCT02A INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 2, 5, 8, 11 3, 6, 9, 12 1, 4, 10, 13 7 14 SYMBOL 1A to 4A 1B to 4...
Description From old datasheet system
QUAD 2-INPUT NOR GATE

File Size 52.05K  /  7 Page

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    74VHCT03A 74VHCT03AM 74VHCT03AT

STMicroelectronics
Part No. 74VHCT03A 74VHCT03AM 74VHCT03AT
OCR Text ...e and double-layer metal wiring c2mos technology. The internal circuit is composed of 3 stages including buffer output, which provides high noise immunity and stable output. This device can, with an external pull-up resistor, PIN CONNECT...
Description QUAD 2-INPUT OPEN DRAIN NAND GATE

File Size 52.16K  /  7 Page

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