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1N474 SC900 74LS24 T2871N HE901U P6KE110 ETEH6012 A1303B
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  differential-to-lvcmos Datasheet PDF File

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    ICS8543BGILF

Integrated Device Technology
Part No. ICS8543BGILF
OCR Text differential-to-lvds fanout buffer ics8543 general description the ics8543 is a low skew, high performance 1-to-4 differential-to-lvds clock fanout buffer. utilizing low voltage differential signaling (lvds) the ics8543 provides a low pow...
Description Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer

File Size 739.45K  /  18 Page

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    MPC9230

http://
MOTOROLA[Motorola, Inc]
Part No. MPC9230
OCR Text ... to 800 MHz1 and the support of differential PECL output signals the device meets the needs of the most demanding clock applications. Features * * * * * * * * * * * * * * * 50 MHz to 800 MHz1 synthesized clock output signal Differential PEC...
Description 800 MHz Low Voltage PECL Clock Synthesizer
800 MHz Low Voltage PECL Clock Synthesizer

File Size 292.31K  /  16 Page

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    SM803020 SM803020UMY SM803020UMYR A18 B20 B12 A44

Micrel Semiconductor
Part No. SM803020 SM803020UMY SM803020UMYR A18 B20 B12 A44
OCR Text ...individually configurable to a differential pecl, lvds, hcsl , or cmos output logic level. pecl is selected by default, but can be overridden through spi. it is packaged in a dual - row 84 - pin 7 mm x 7mm pac kage. datashee...
Description Flexible Ultra-Low Jitter Clock Synthesizer
   Flexible Ultra-Low Jitter Clock Synthesizer

File Size 883.19K  /  14 Page

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    Maxim
Part No. MAX9211 MAX9213 MAX9215 MAX9209
OCR Text ..._, TxCLK OUT_) Short to GND and Differential Short .......................Continuous Continuous Power Dissipation (TA = +70C) 48-Pin TSSOP (derate 16mW/C above +70C) ....... 1282mW 48-Lead QFN (derate 26.3mW/C above +70C) ......2105mW Stora...
Description Programmable DC-Balance 21-Bit Serializers

File Size 412.04K  /  19 Page

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    NB3F8L3005C NB3F8L3005CMNTXG NB3F8L3005CMNTBG

ON Semiconductor
Part No. NB3F8L3005C NB3F8L3005CMNTXG NB3F8L3005CMNTBG
OCR Text ...s between a crystal input, or a differential/se clock / data inputs. differential inputs accept lvpecl, lvds, hcsl, or sstl and single?ended...to 200 mhz ? differential inputs accept lvpecl, lvds, hcsl, sstl, or lvcmos/lvttl ? crystal interfac...
Description 1:5 LVCMOS Fanout Buffer

File Size 114.02K  /  13 Page

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    INTEGRATED DEVICE TECHNOLOGY INC
Part No. M1010-01-155.5200LF
OCR Text ... reference clock inputs support differential lvds, lvpecl, as well as single -ended lvcmos, lvttl single 3.3v power supply small 9 x 9 mm...to + 3.3 v. 12, 13, 17, 25, 32 nc no internal connection. 15 16 fout nfout output no internal termin...
Description PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), CQCC36

File Size 151.68K  /  8 Page

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