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  qdrtm Datasheet PDF File

For qdrtm Found Datasheets File :: 135    Search Time::1.688ms    
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    CY7C1526V18-167BZI CY7C1526V18-167BZXC CY7C1526V18-167BZXI CY7C1526V18-200BZI CY7C1526V18-200BZXC CY7C1526V18-200BZXI CY

Cypress Semiconductor
Part No. CY7C1526V18-167BZI CY7C1526V18-167BZXC CY7C1526V18-167BZXI CY7C1526V18-200BZI CY7C1526V18-200BZXC CY7C1526V18-200BZXI CY7C1526V18-250BZI CY7C1526V18-250BZXC CY7C1526V18-250BZXI CY7C1526V18-278BZC CY7C1526V18-278BZI CY7C1526V18-278BZXC CY7C1526V18-278BZXI CY7C1526V18-300BZC CY7C1526V18-300BZI CY7C1526V18-300BZXC CY7C1526V18-300BZXI CY7C1513V18-167BZI CY7C1513V18-167BZXC CY7C1513V18-167BZXI CY7C1513V18-200BZI CY7C1513V18-200BZXC CY7C1513V18-200BZXI CY7C1513V18-250BZI CY7C1513V18-250BZXC CY7C1513V18-250BZXI CY7C1513V18-278BZC CY7C1513V18-278BZI CY7C1513V18-278BZXC CY7C1513V18-278BZXI CY7C1513V18-300BZC CY7C1513V18-300BZI CY7C1513V18-300BZXC CY7C1513V18-300BZXI CY7C1511V18-167BZI CY7C1511V18-167BZXC CY7C1511V18-167BZXI CY7C1511V18-200BZI CY7C1511V18-200BZXI CY7C1511V18-250BZI CY7C1511V18-250BZXC CY7C1511V18-250BZXI CY7C1511V18-278BZC CY7C1511V18-278BZI CY7C1511V18-278BZXC CY7C1511V18-278BZXI CY7C1511V18-300BZC CY7C1511V18-300BZI CY7C1511V18-300BZXC CY7C1511V18-300BZXI CY7C1511V1806
OCR Text qdrtm- II SRAM 4-Word Burst Architecture Features * Separate Independent Read and Write Data Ports -- Supports concurrent transactions * 300-MHz Clock for High Bandwidth * 4-Word Burst for reducing address bus frequency * Double Data Rate...
Description 72-Mbit QDR⑩- II SRAM 4-Word Burst Architecture

File Size 446.31K  /  28 Page

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    CY7C1305BV25-167BZI CY7C1305BV25-167BZXC CY7C1305BV25-167BZXI CY7C1305BV2506

Cypress Semiconductor
Part No. CY7C1305BV25-167BZI CY7C1305BV25-167BZXC CY7C1305BV25-167BZXI CY7C1305BV2506
OCR Text qdrtm Architecture Features * Separate independent Read and Write data ports * Supports concurrent transactions * 167-MHz clock for high bandwidth * 2.5 ns Clock-to-Valid access time * 4-Word Burst for reducing the address bus frequency *...
Description 18-Mbit Burst of 4 Pipelined SRAM with QDR⑩ Architecture

File Size 745.53K  /  21 Page

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    CY7C1543V18 CY7C1543V18-300BZC CY7C1543V18-300BZI CY7C1543V18-300BZXC CY7C1543V18-300BZXI CY7C1543V18-333BZC CY7C1543V18

Cypress Semiconductor
Part No. CY7C1543V18 CY7C1543V18-300BZC CY7C1543V18-300BZI CY7C1543V18-300BZXC CY7C1543V18-300BZXI CY7C1543V18-333BZC CY7C1543V18-333BZI CY7C1543V18-333BZXC CY7C1543V18-333BZXI CY7C1543V18-375BZC CY7C1543V18-375BZI CY7C1543V18-375BZXC CY7C1543V18-375BZXI CY7C1541V18-375BZC CY7C1556V18-375BZC CY7C1545V18-375BZC CY7C1545V18-333BZI CY7C1545V18-300BZC CY7C1545V18-300BZI CY7C1545V18-300BZXC CY7C1545V18-333BZC CY7C1545V18-300BZXI CY7C1541V18-300BZI CY7C1541V18-333BZI CY7C1541V18-333BZXI CY7C1541V18-333BZXC
OCR Text qdrtm-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) Features Configurations With Read Cycle Latency of 2.0 cycles: CY7C1541V18 - 8M x 8 CY7C1556V18 - 8M x 9 CY7C1543V18 - 4M x 18 CY7C1545V18 - 2M x 36 Separate indepe...
Description 72-Mbit QDR垄芒-II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
72-Mbit QDR?II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)

File Size 983.61K  /  28 Page

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    CY7C1410AV18-167BZI CY7C1410AV18-167BZXC CY7C1410AV18-167BZXI CY7C1410AV18-200BZI CY7C1410AV18-200BZXC CY7C1410AV18-200B

Cypress Semiconductor
Part No. CY7C1410AV18-167BZI CY7C1410AV18-167BZXC CY7C1410AV18-167BZXI CY7C1410AV18-200BZI CY7C1410AV18-200BZXC CY7C1410AV18-200BZXI CY7C1410AV18-250BZI CY7C1410AV18-250BZXC CY7C1410AV18-250BZXI CY7C1410AV1807 CY7C1425AV18-167BZI CY7C1425AV18-167BZXC CY7C1425AV18-167BZXI CY7C1425AV18-200BZI CY7C1425AV18-200BZXC CY7C1425AV18-200BZXI CY7C1425AV18-250BZI CY7C1425AV18-250BZXC CY7C1425AV18-250BZXI CY7C1412AV18-167BZI CY7C1412AV18-167BZXC CY7C1412AV18-167BZXI CY7C1412AV18-200BZI CY7C1412AV18-200BZXC CY7C1412AV18-200BZXI CY7C1412AV18-250BZI CY7C1412AV18-250BZXC CY7C1412AV18-250BZXI
OCR Text ... Pipelined SRAMs, equipped with qdrtm-II architecture. QDR-II architecture consists of two separate ports to access the memory array. The Read port has dedicated Data Outputs to support Read operations and the Write Port has dedicated Data ...
Description 36-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture

File Size 992.30K  /  25 Page

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    CY7C1410AV1809

Cypress Semiconductor
Part No. CY7C1410AV1809
OCR Text qdrtm-II SRAM 2-Word Burst Architecture Features Functional Description The CY7C1410AV18, CY7C1425AV18, CY7C1412AV18, and CY7C1414AV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR-II architecture. QDR-II architecture consi...
Description 36-Mbit QDR-II SRAM 2-Word Burst Architecture

File Size 418.20K  /  29 Page

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    CY7C1410BV18-167BZI CY7C1410BV18-167BZXI CY7C1425BV18-167BZXI CY7C1412BV18 CY7C1412BV18-167BZI CY7C1412BV18-167BZXI CY7C

Cypress Semiconductor
Part No. CY7C1410BV18-167BZI CY7C1410BV18-167BZXI CY7C1425BV18-167BZXI CY7C1412BV18 CY7C1412BV18-167BZI CY7C1412BV18-167BZXI CY7C1414BV18 CY7C1414BV18-167BZI
OCR Text ... Pipelined SRAMs, equipped with qdrtm-II architecture. QDR-II architecture consists of two separate ports to access the memory array. The Read port has dedicated Data Outputs to support Read operations and the Write Port has dedicated Data ...
Description 36-Mbit QDR-II垄芒 SRAM 2-Word Burst Architecture
36-Mbit QDR-II SRAM 2-Word Burst Architecture
36-Mbit QDR-II?/a> SRAM 2-Word Burst Architecture

File Size 1,105.89K  /  26 Page

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    CY7C1910BV18 CY7C1910BV18-167BZC CY7C1310BV18 CY7C1310BV18-167BZC CY7C1310BV18-200BZC CY7C1310BV18-250BZC CY7C1312BV18 C

CYPRESS[Cypress Semiconductor]
Part No. CY7C1910BV18 CY7C1910BV18-167BZC CY7C1310BV18 CY7C1310BV18-167BZC CY7C1310BV18-200BZC CY7C1310BV18-250BZC CY7C1312BV18 CY7C1312BV18-167BZC CY7C1312BV18-200BZC CY7C1312BV18-250BZC CY7C1314BV18 CY7C1314BV18-167BZC CY7C1314BV18-200BZC CY7C1314BV18-250BZC
OCR Text ... Pipelined SRAMs, equipped with qdrtm-II architecture. QDR-II architecture consists of two separate ports to access the memory array. The Read port has dedicated Data Outputs to support Read operations and the Write Port has dedicated Data ...
Description 18-Mbit QDR-II SRAM 2-Word Burst Architecture

File Size 482.07K  /  25 Page

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    LTC3718 LTC3718EG

Linear Technology
Part No. LTC3718 LTC3718EG
OCR Text ...egulator controller for DDR and qdrtm memory termination. It operates from an input as low as 1.5V and provides a regulated output voltage equal to (0.5)VIN. The controller uses a valley current control architecture to enable high frequency...
Description Low Input Voltage DC/DC Controller for DDR/QDR Memory Termination

File Size 240.62K  /  20 Page

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    LTC3717-1 LTC3717EUH-1

Linear Technology
Part No. LTC3717-1 LTC3717EUH-1
OCR Text ...ate (DDR) and Quad Data RateTM (qdrtm) memory termination. The controller uses a valley current control architecture to deliver very low duty cycles with or without a sense resistor. Operating frequency is selected by an external resistor a...
Description Wide Operating Range, No RSENSE TM Step-Down Controller for DDR/QDR Memory Termination

File Size 265.33K  /  20 Page

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    XILINX[Xilinx, Inc]
Part No. XC2V1000 XC2V8000 XC2V1000-4FG456C XC2V1000-4FG456I XC2V1000-5FG456C XC2V1000-5FG456I XC2V1000-6FG456C XC2V1000-6FG456I XC2V1500 XC2V2000 XC2V250 XC2V3000 XC2V40 XC2V4000 XC2V500 XC2V6000 XC2V80
OCR Text ...M interfaces * SDR / DDR SRAM * qdrtm SRAM - CAM interfaces Arithmetic Functions - Dedicated 18-bit x 18-bit multiplier blocks - Fast look-ahead carry logic chains Flexible Logic Resources - Up to 93,184 internal registers / latches with Cl...
Description From old datasheet system
Virtex-II Platform FPGAs: Complete Data Sheet

File Size 1,638.08K  /  311 Page

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For qdrtm Found Datasheets File :: 135    Search Time::1.688ms    
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