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true-differential Datasheet PDF File

For true-differential Found Datasheets File :: 5705 Search Time::1.219ms
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				INTEGRATED DEVICE TECHNOLOGY INC
Part No.	9DB233AGILFT 9DB233AGLFT
OCR Text	...rc_in in 0.7 v differential src true input 3 src_in# in 0.7 v differential src complementary input 4voe0# in active low input for enabling dif pair 0. this pin has an internal pull-down. 1 =disable outputs, 0 = enable outputs 5 vdd pwr pow...
Description	9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
File Size	165.83K / 14 Page	View it Online	Download Datasheet

				Integrated Device Technology
Part No.	ICS9DBL411
OCR Text	...ide of differential input clock True side of differential input clock 3.3V Power for the Analog Core Ground for the Analog Core Output Enable for DIF3 output. Control is as follows: 0 = enabled, 1 = Low-Low Complement clock of low power dif...
Description	Four Output Differential Fanout Buffer for PCI Express Gen 1 & 2
File Size	79.20K / 9 Page	View it Online	Download Datasheet

				XILINX INC
Part No.	XC2V3000-6FF1517C
OCR Text	...? memory hierarchy - 3.5 mb of true dual-port ? ram in 18-kbit block selectram resources - up to 1.9 mb of distributed selectram resour...differential standards - programmable sink current (2 ma to 24 ma) per i/o -xcite ? digital contro...
Description	FPGA, 3584 CLBS, 3000000 GATES, PBGA1517
File Size	685.20K / 70 Page	View it Online	Download Datasheet

				INTEGRATED DEVICE TECHNOLOGY INC
Part No.	IDT5T9304PG IDT5T9304PGG 5T9304PGGI
OCR Text	...) clock input. a [1:2] is the "true" side of the differential clock input. 14, 23 a 1 , a 2 input adjustable (1, 4) complementary clock inputs. a[1:2] is the complementary side of a[1:2] . for lvttl single-ended operation, a[1:2] sho...
Description	LVDS, 1:4 Clock Buffer Terabuffer 5T SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
File Size	659.07K / 15 Page	View it Online	Download Datasheet

				MAXIM[Maxim Integrated Products]
Part No.	MAX1033 MAX1032EUG MAX1033EUP MAX1032
OCR Text	...s eight (single-ended) or four (true differential) analog input channels. The MAX1033 provides four (single-ended) or two (true differential) analog input channels. Each analog input channel is independently software programmable for seven ...
Description	8-/4-Channel, 【12V Multirange Inputs, Serial 14-Bit ADCs
File Size	677.66K / 31 Page	View it Online	Download Datasheet

				Integrated Circuit Systems
Part No.	ICS950223
OCR Text	...are required for voltage bias. "True" clocks of differential pair CPU outputs. These are current mode outputs. External resistors are required for voltage bias. Supply for CPU clocks, 3.3V nominal "Complimentary" clocks of differential pair...
Description	Programmable Timing Control Hub for P4
File Size	206.61K / 24 Page	View it Online	Download Datasheet

				Cypress Semiconductor, Corp.
Part No.	CY24293ZXI CY24293ZXC CYPRESSSEMICONDUCTORCORP-CY24293ZXCT
OCR Text	...or clock input. 6 oe input high true output enable pin. when set low, pci-e outputs are tri-stated. has internal weak pull-up. 7 gndx pow...differential pci-express complementary clock output. tristated when disabled. 11 pcie1p output diffe...
Description	Two Outputs PCI-Express Clock Generator; VDD: 3.3 V; Input Frequency: 25 MHz; Output Frequency: 25 MHz to 200 MHz; # Out: 2 200 MHz, OTHER CLOCK GENERATOR, PDSO16
File Size	220.81K / 13 Page	View it Online	Download Datasheet

				Analog Devices
Part No.	AD7328BRU-U1
OCR Text	True bipolar Input, 12-Bit Plus Sign ADC Preliminary Technical Data AD7328* FEATURES * 12-Bit plus Sign SAR ADC * True Bipolar Input Range...Differential and Pseudo Differential Analog Input Capability * High Analog Input Impedance * Low Pow...
Description	Software Selectable, True Bipolar Input, 8-Channel, 12-Bit Plus Sign A/D Converter
File Size	347.40K / 24 Page	View it Online	Download Datasheet

				Integrated Circuit Systems
Part No.	ICS557-06 ICS557G-06 ICS557G-06LF ICS557G-06LFT ICS557G-06T
OCR Text	...age for Input clocks. HCSL/LVDS true input signal 1. HCSL/LVDS complimentary input signal 1. Powers down the chip and tri-states outputs whe...Differential Complimentary output clock D. Differential True output clock D. Differential Compliment...
Description	ONE TO FOUR HCSL CLOCK BUFFER
File Size	187.03K / 10 Page	View it Online	Download Datasheet

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