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Infineon
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Part No. |
SDA9064-5
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OCR Text |
... EP 508 EP 500 TR 508 TR 500 VS 608 VS 600 PH 608 East/west parabola during 100-Hz operating mode East/west trapezoidal correction during 10...bit 120-Hz operating mode DDC uses fixed raster data from the internal RAM 1
Table 3 Status Word ... |
Description |
Digital Deflection Controller
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File Size |
1,066.70K /
45 Page |
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it Online |
Download Datasheet |
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XILINX
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Part No. |
XC4028XL-3
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OCR Text |
... Arrays Logic Cells 152 238 466 608 770 950 1368 1862 2432 2432 3078 3800 4598 5472 7448 Max Logic Max. RAM Gates Bits (No RAM) (No Logic) 1...bit stream. Because Xilinx FPGAs can be reprogrammed an unlimited number of times, they can be used ... |
Description |
XC4000 Field Programmable Gate Array
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File Size |
456.13K /
68 Page |
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it Online |
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Linear
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Part No. |
LTC2400 2400P
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OCR Text |
... CS
2400 TA01
-10 0 8,338,608 OUTPUT CODE (DECIMAL) 16,777,215
2400 TA02
Specifications on this data sheet are preliminary only, a...Bit Data Output Time External SCK 32-Bit Data Output Time CS to SDO Low Z CS to SDO High Z CS to ... |
Description |
24-Bit Power ADC in SO-8 From old datasheet system
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File Size |
340.97K /
20 Page |
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it Online |
Download Datasheet |
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Price and Availability
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