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ICST[Integrated Circuit Systems]
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Part No. |
ICS8702BYT ICS8702 ICS8702BY
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OCR Text |
... any differential input signal (pecl, hstl, LVDS) to LVCMOS levels without external bias networks Translates any single-ended input signal to LVCMOS levels with a resistor bias on nCLK input Translates any single-ended input signal to inv... |
Description |
LOW SKEW ±1, ±2 CLOCK GENERATOR
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File Size |
186.44K /
12 Page |
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it Online |
Download Datasheet |
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Altera, Corp.
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Part No. |
EP20K400E
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OCR Text |
...fferential signaling (lvds), lv pecl, pci-x, agp, ctt, stub- series terminated logic (s stl-3 and sstl-2), gunning transceiver logic plus (gtl+), and high-speed terminated logic (hstl class i) ? pull-up on i/o pins before and during confi... |
Description |
Programmable Logic Device Family 可编程逻辑器件系列
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File Size |
593.38K /
117 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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