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NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
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| Part No. |
74ALVT162821 AV162821DL 74ALVT162821DGG 74ALVT162821DL AV162821DGG
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| OCR Text |
...C CL = 50pF VI = 0V or VCC VO = 0 or VCC Outputs disabled TYPICAL UNIT 2.5V 4.4 3.8 3 9 40 3.3V 3.2 3.2 3 9 70 ns pF pF A
ORDERING INFORM...02
2
853-2041 20127
Philips Semiconductors
Product specification
2.5V/3.3V 20-bit bus... |
| Description |
2.5V/3.3V 20-bit bus-interface D-type flip-flop; positive-edge trigger with 30Ω termination resistors(3-State)(30 Ω终端电阻.5V/3.3V 20位总线接口上升沿触D触发器（三态）) 2.5V/3.3V0位总线接口D型触发器，积极与30Ω终端电阻3态）（带30Ω终端电阻.5V/3.3V0位总线接口上升沿触发沿触发触发器（三态）
Dual 2-Line To 4-Line Decoders/Demultiplexers 16-SO -40 to 85
2.5V/3.3V 20-bit bus-interface D-type flip-flop; positive-edge trigger with 30ohm termination resistors 3-State
2.5 V / 3.3 V 20-bit bus-interface D-type flip-flop, positive-edge trigger with 30 Ohm termination resistors (3-State)
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| File Size |
100.42K /
12 Page |
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ICS
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| Part No. |
ICS93718
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| OCR Text |
...RT(11:6) DDRC (11:6)
SEL_DDR=0
3.3V
0434E--02/17/05
ICS93718
ICS93718
Pin Descriptions
PIN NUMBER 1 2, 8, 12, 17, 23, 3, 9, 14, 18, 26, 31, 35, 40, 46 45, 43, 39, 34, 30, 28, 44, 42, 38, 33, 29, 27, 21, 19, 15, 10, 6, 4 P... |
| Description |
Clock Buffer
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| File Size |
128.98K /
9 Page |
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it Online |
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Maxim
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| Part No. |
MAX555EVKIT
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| OCR Text |
...on
PART MAX555EVKIT TEMP RANGE 0 to +70C IC PACKAGE 64 TQFP-EP*
*EP = Exposed pad.
Component List
DESIGNATION C1-C4, C7-10, C14-C18, C25, C26, C28 C19, C20 C21 C22 C23, C24 J1-J16 R1-R13, R20, R21 R14 R16 R17 R18 R19 U1 U2 U3 U4 QTY... |
| Description |
Evaluation Kit for the MAX555
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| File Size |
298.56K /
6 Page |
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it Online |
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Motorola
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| Part No. |
MPC9109
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| OCR Text |
...m body size with a conservative 0.8mm pin spacing.
Pentium II is a trademark of Intel Corporation.
3/99
(c) Motorola, Inc. 1999
...02 ISSUE A
A A1
32 25
4X
0.20 (0.008) AB T-U Z
1
-T- B B1
8
-U- V P DETAIL Y
17
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| Description |
MPC9109 Low Voltage 1:18 Clock Distribution Chip
Low Voltage 1:18 Clock Distribution Chip
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| File Size |
103.11K /
8 Page |
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IDT
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| Part No. |
QS52805T_AT
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| OCR Text |
...l buffer Guaranteed low skew: * 0.7ns output skew (same bank) * 0.9ns output skew (different bank) * 1ns part-to-part skew 25 on-chip resist...02) tSK(P) tSK(T) Parameter (1) Skew between two outputs, same transition, same bank Skew between tw... |
| Description |
GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
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| File Size |
84.11K /
6 Page |
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Zarlink
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| Part No. |
ZL40000
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| OCR Text |
...are passed through two separate 0 to -40dB AGC stages before output as two isolated independent differential Signals. The device is built on...02 -1.49
Typical Gain in dB
Figure 16 - Typical Gain Matching / AGC @25C / Vcc
Gain Match / G... |
| Description |
3/6 Channel DC to 2 GHz Power Splitter
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| File Size |
355.01K /
26 Page |
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it Online |
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Price and Availability
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