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  synchr. Datasheet PDF File

For synchr. Found Datasheets File :: 281    Search Time::1.656ms    
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    GSI Technology, Inc.
Part No. GS815018AB-250 GS815018AGB-250 GS815036AB-250 GS815036AGB-250I GS815018AGB-357 GS815018AGB-333I GS815018AB-300I GS815036AB-300 GS815036AB-333I GS815036AGB-333I GS815036AB-333IT GS815018AB-357IT GS815036AB-357IT GS815018AB-250T
OCR Text ...iption because gs815018/36a are synchr onous devices, address data inputs and read/write control inputs are captured on the rising edge of the input clock. write cy cles are internally self-timed and initiated by the risi ng edge of the ...
Description 1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM 1M X 18 LATE-WRITE SRAM, 2 ns, PBGA119
1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM 512K X 36 LATE-WRITE SRAM, 2 ns, PBGA119
1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM 1M X 18 LATE-WRITE SRAM, 1.4 ns, PBGA119
1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM 1M X 18 LATE-WRITE SRAM, 1.5 ns, PBGA119
1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM 1M X 18 LATE-WRITE SRAM, 1.6 ns, PBGA119
1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM 512K X 36 LATE-WRITE SRAM, 1.6 ns, PBGA119
1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM 512K X 36 LATE-WRITE SRAM, 1.5 ns, PBGA119
512K X 36 LATE-WRITE SRAM, 1.4 ns, PBGA119

File Size 221.21K  /  25 Page

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    GSI Technology, Inc.
Part No. GS8162Z18BB-150 GS8162Z18BGB-200 GS8162Z36BGD-250I GS8162Z36BGD-150I
OCR Text ...near burst order and sleep) are synchr onized to rising clock edges. single c ycle read and write operat ions must be initiated with the advance/ load pin (adv) held low, in order to load the new address. device activation is accomplishe...
Description 18Mb Pipelined and Flow Through Synchronous NBT SRAM 1M X 18 ZBT SRAM, 7.5 ns, PBGA119
18Mb Pipelined and Flow Through Synchronous NBT SRAM 1M X 18 ZBT SRAM, 6.5 ns, PBGA119
18Mb Pipelined and Flow Through Synchronous NBT SRAM 512K X 36 ZBT SRAM, 5.5 ns, PBGA165
18Mb Pipelined and Flow Through Synchronous NBT SRAM 512K X 36 ZBT SRAM, 7.5 ns, PBGA165

File Size 783.57K  /  34 Page

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    MC100LVEL38DW

ON Semiconductor
Part No. MC100LVEL38DW
OCR Text ...nput must be asserted to ensure synchr onization. for systems which only use one lvel38, the mr pin need not be exercised as the internal divider design ensures synchronization between the 2 and the 4/6 outputs of a single device. the ...
Description 3.3V ECL &#247; 2, &#247; 4/6 Clock Generator Chip; Package: SOIC-20 WB; No of Pins: 20; Container: Rail; Qty per Container: 38 100LVEL SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20

File Size 216.99K  /  7 Page

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    GSI Technology, Inc.
Part No. GS8640Z18T-167I GS8640Z18T-200 GS8640Z18T-200I
OCR Text ...near burst order and sleep) are synchr onized to rising clock edges. single c ycle read and write operat ions must be initiated with the advance/ load pin (adv) held low, in order to load the new address. device activation is accomplishe...
Description 72Mb Pipelined and Flow Through Synchronous NBT SRAM 4M X 18 ZBT SRAM, 8 ns, PQFP100
72Mb Pipelined and Flow Through Synchronous NBT SRAM 4M X 18 ZBT SRAM, 7.5 ns, PQFP100

File Size 611.80K  /  25 Page

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    GSI Technology, Inc.
Part No. GS8640ZV18T-167I GS8640ZV36GT-167I
OCR Text ...near burst order and sleep) are synchr onized to rising clock edges. single c ycle read and write operati ons must be initiated with the advance/load pin (adv) held low, in order to load the new address. device activation is accomplished...
Description 72Mb Pipelined and Flow Through Synchronous NBT SRAM 4M X 18 ZBT SRAM, 8 ns, PQFP100
72Mb Pipelined and Flow Through Synchronous NBT SRAM 2M X 36 ZBT SRAM, 8 ns, PQFP100

File Size 443.58K  /  23 Page

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    K7A803600B06

Samsung semiconductor
Part No. K7A803600B06
OCR Text ...pril 2006 256kx36 & 512kx18-bit synchr onous pipelined burst sram the k7a803600b and k7a801800b are 9,437,184-bit syn- chronous static random acce ss memory designed for high performance second level cache of pentium and power pc based sys...
Description 256Kx36 & 512Kx18 Synchronous SRAM

File Size 417.41K  /  19 Page

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    Microsemi
Part No. LXM1597-01
OCR Text ...g a patent pend- ing curr ent synchr onous, zero voltage switching (cs-zvs) topology. cs-zvs pro- duces nearly pure sine wave currents in the lamp enabling maximum light delivery while reducing both conducted and radiated noise. this t...
Description CCFL Inverter Module - Single Lamp

File Size 236.62K  /  5 Page

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    CY7C1511V18

Cypress Semiconductor
Part No. CY7C1511V18
OCR Text ...3v18, and cy7c1515v18 are 1.8v synchr onous pipelined srams, equipped with qdr-ii architecture. qdr-ii architecture consists of two separate ports to access the memory array. the read port has dedicated data outputs to support read op...
Description (CY7C15xxV18) SRAM 4-Word Burst Architecture

File Size 564.17K  /  23 Page

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    Motorola Semiconductor
Part No. MC56F8036
OCR Text ...rsions ? adc conversions can be synchr onized by both pwm and timer modules ? sampling rate up to 2.67msps ? 16-word result buffer registers ? two internal 12-bit digita l-to-analog converters (dacs) ? 2 microsecond settling time when outp...
Description Digital Signal Controller

File Size 280.65K  /  12 Page

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    SAF-XC164D-8R40F SAF-XC164D-8R20F SAF-XC164D-16R40F XC164D-16F SAF-XC164D-16R20F

Infineon Technologies AG
Part No. SAF-XC164D-8R40F SAF-XC164D-8R20F SAF-XC164D-16R40F XC164D-16F SAF-XC164D-16R20F
OCR Text ...nnels (usarts) ? two high-speed-synchr onous serial channels ? on-chip twincan interface (rev. 2. 0b active) with 32 message objects (full can/basic can) on two can nodes, and gatewa y functionality ? on-chip real time clock ? idle, sleep,...
Description 16-Bit Single-Chip Microcontroller with C166SV2 Core
16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP100

File Size 839.34K  /  76 Page

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For synchr. Found Datasheets File :: 281    Search Time::1.656ms    
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