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POLYFET[Polyfet RF Devices]
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| Part No. |
LP722
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| OCR Text |
...
CAPACITANCE VS VOLTAGE
L1C 2die CAPACITANCE
Coss
100
Pout
30 25 20 15
11.50 11.00 10.50
1dB compression = 35W
Ciss
Gain Efficiency = 57%
10.00 9.50 9.00 8.50 8.00
10
10 5 0 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 P... |
| Description |
SILICON GATE ENHANCEMENT MODE RF POWER LDMOS TRANSISTOR
|
| File Size |
34.28K /
2 Page |
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it Online |
Download Datasheet
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POLYFET[Polyfet RF Devices]
|
| Part No. |
LX802
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| OCR Text |
...
CAPACITANCE VS VOLTAGE
L2A 2die CAPACITANCE 16.00
100
Ciss
14.00
10
Coss
Efficiency = 55%
12.00
Crss
10.00 4
GAIN 1 0 5 10
PIN IN WATTS
VDS IN VOLTS
15
20
25
30
IV CURVE
L2A 2 DIE IV
14 12 1... |
| Description |
SILICON GATE ENHANCEMENT MODE RF POWER LDMOS TRANSISTOR
|
| File Size |
36.22K /
2 Page |
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it Online |
Download Datasheet |
| |
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POLYFET[Polyfet RF Devices]
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| Part No. |
LY402
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| OCR Text |
...0
CAPACITANCE VS VOLTAGE
L4 2die CAPACITANCE
Ciss
Pout
15
Coss
14 10 13
Gain
Crss
VDS IN VOLTS
IV CURVE
L4 2 DIE IV
35 30
100
ID & GM VS VGS
L4 2 DIE ID, GM vs VG
ID
25 ID IN AMPS
10
20 15 10 5 ... |
| Description |
SILICON GATE ENHANCEMENT MODE RF POWER LDMOS TRANSISTOR
|
| File Size |
36.06K /
2 Page |
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it Online |
Download Datasheet |
| |
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Maxwell Technologies, Inc
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| Part No. |
97SD3240
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| OCR Text |
... 3-layer stack package contains 2die in layer one and two and one die in layer three. clk1 clocks die 1, 3 and 5, while clk2 clocks die 2 and 4.
97sd3240 m e m o r y 3 all data sheets are subject to change without notice ?2005 maxwell t... |
| Description |
1.25Gb SDRAM 8-Meg X 40-Bit X 4-Banks
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| File Size |
586.37K /
38 Page |
View
it Online |
Download Datasheet |
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