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  balance master Datasheet PDF File

For balance master Found Datasheets File :: 822    Search Time::7.828ms    
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    STLC5048 STLC5048TR

ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
Part No. STLC5048 STLC5048TR
OCR Text ...EDANCE PROGRAMMABLE TRANSHYBRID balance FILTER PROGRAMMABLE EQUALIZATION (FREQUENCY RESPONSE) PROGRAMMABLE TIME SLOT ASSIGNMENT DIGITAL AND ...master Clock Input. Four possible frequencies can be used: 1.536/1.544 MHz; 2.048 MHz; 4.096 MHz; 8....
Description FULLY PROGRAMMABLE FOUR CHANNEL CODEC AND FILTER
FULLY PROGRAMMABLE FOUR CHANNEL CODEC AND FILTER

File Size 368.69K  /  45 Page

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    TS5070 TS5070FN TS5070FNTR TS5071 TS5071N TSP5070FNTR TSP5071N TSW5071N

ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
Part No. TS5070 TS5070FN TS5070FNTR TS5071 TS5071N TSP5070FNTR TSP5071N TSW5071N
OCR Text ...dB RANGE, 0.1 dB STEPS - HYBRID balance CANCELLATION FILTER - TIME-SLOT ASSIGNMENT: UP TO 64 SLOTS/FRAME - 2 PORT ASSIGNMENT (TS5070) - 6 IN...master clock input used by the switched capacitor filters and the encoder and decoder sequencing log...
Description PROGRAMMABLE CODEC/FILTER COMBO 2ND GENERATION

File Size 281.91K  /  32 Page

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    SY89801A SY89801AMC SY89801AMCA

MICREL[Micrel Semiconductor]
Part No. SY89801A SY89801AMC SY89801AMCA
OCR Text ...atio. The table was designed to balance several constraints: s 2.5:1 VCO frequency range s Maximum system frequency of 120MHz plus 10% margin s Maximum output frequency of 264MHz FSEL <2:0> 000 001 010 011 100 101 110 111 PCLK:RCLK 1:...
Description HP PA-8000 CLOCK SOURCE

File Size 80.94K  /  5 Page

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    T7507

Agere Systems
Part No. T7507
OCR Text balance Features s s Description The T7507 device is a single-chip, four-channel A-law PCM codec with filters. This integrated circuit...master clock frequency: 2.048 MHz On-chip sample and hold, autozero, and precision voltage reference...
Description T7507 Quad PCM Codec with Filters, Termination Impedance, and Hybrid balance

File Size 331.09K  /  30 Page

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    CXD2597Q

SONY[Sony Corporation]
Part No. CXD2597Q
OCR Text ...l function for servo loop * E:F balance, focus bias adjustment functions Digital Filter, DAC and Analog Low-Pass Filter Blocks * DBB (digita...master clock: 384Fs, typ.) Logical value: 109dB * THD + N: 0.007% or less (master clock: 384Fs, typ....
Description CD Digital Signal Processor with Built-in Digital Servo and DAC

File Size 874.80K  /  115 Page

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    CXD2598 CXD2598Q

SONY[Sony Corporation]
Part No. CXD2598 CXD2598Q
OCR Text ...l function for servo loop * E:F balance, focus bias adjustment functions * Surf jump function supporting micro two-axis * Tracking filter: 6...master clock: 384Fs, typ.) Logical value: 109dB * THD + N: 0.007% or less (master clock: 384Fs, typ....
Description CD Digital Signal Processor with Built-in Digital Servo and DAC

File Size 1,117.24K  /  147 Page

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    EZ1900 EZ1900CS

SEMTECH[Semtech Corporation]
Part No. EZ1900 EZ1900CS
OCR Text balance CONTROLLER May 27, 1999 EZ1900 TEL:805-498-2111 FAX:805-498-3804 WEB:http://www.semtech.com DESCRIPTION The EZ1900 is a h...master Regulator) VM VOUT 3.500 3.300 2.900 2.800 2.700 2.600 2.500 R3 130 115 133 137 137 121 115 R...
Description REGULATOR balance CONTROLLER

File Size 94.83K  /  5 Page

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    HD1-6408-9 HD3-6408-9 HD-6408 FN2952

Intersil, Corp.
INTERSIL[Intersil Corporation]
Part No. HD1-6408-9 HD3-6408-9 HD-6408 FN2952
OCR Text ... turn supplies the clock to the balance of the Decoder. Input a frequency equal to 12X the data rate. A high input should be applied to BIPO...master RESET clears the 2:1 counters in both the encoder and decoder and the / 6 counter. DIVIDE BY ...
Description Bridge Rectifier; Package/Case:TO-220; Current Rating:8A; Mounting Type:Through Hole DATACOM, MANCHESTER ENCODER/DECODER, PDIP24
CMOS Asynchronous Serial Manchester Adapter (ASMA)
From old datasheet system

File Size 57.15K  /  11 Page

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    SAA7345 SAA7345GP SAA7366T

PHILIPS[Philips Semiconductors]
Part No. SAA7345 SAA7345GP SAA7366T
OCR Text ...pend on the application and the balance between head room and operating signal-to-noise ratio. Behaviour during overload As defined earlier ...master and slave modes (see Figs 3 and 4). In both modes the interface provides up to 18 significant...
Description Bitstream conversion ADC for digital audio systems

File Size 84.49K  /  20 Page

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    CXD2719Q

SONY[Sony Corporation]
Part No. CXD2719Q
OCR Text ...coder including BNR, auto input balance, a noise sequencer and center channel mode control are contained on a single chip. Features * Dolby ...master clock. Crystal oscillator circuit output. Crystal oscillator circuit input. Analog GND for ma...
Description Single-Chip Dolby Pro Logic Surround Decoder

File Size 454.21K  /  58 Page

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For balance master Found Datasheets File :: 822    Search Time::7.828ms    
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