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differential lvcmos-to-lvcmos Datasheet PDF File

For differential lvcmos-to-lvcmos Found Datasheets File :: 3640 Search Time::4.25ms
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				ICST[Integrated Circuit Systems]
Part No.	ICS843004 ICS843004AG ICS843004AGT
OCR Text	...Y SYNTHESIZER Type Description differential output pair. LVPECL interface levels. Output supply pins. differential output pair. LVPECL inte...LVCMOS/LVTTL interface levels. Selects between the PLL and TEST_CLK as input to the dividers. When P...
Description	FEMTOCLOCKS LVCMOS/CRYSTAL-TO- 3.3V LVPECL FREQUENCY SYNTHESIZER FEMTOCLOCKS⑩ LVCMOS/CRYSTAL-TO- 3.3V LVPECL FREQUENCY SYNTHESIZER
File Size	288.06K / 16 Page	View it Online	Download Datasheet

				Integrated Circuit Syst... ICST[Integrated Circuit Systems] NXP Semiconductors N.V. DOMINANT Opto Technologies Sdn. Bhd.
Part No.	ICSSSTV16857 ICSSSTV16857YL-T ICS16857 ICSSSTV16857YG-T ICSSSTV16857YGLF-T
OCR Text	...ory Modules Product Features: * differential clock signal * Meets SSTL_2 signal data * Supports SSTL_2 class I & II specifications * low-vol...LVCMOS. Data flow from D to Q is controlled by the differential clock, CLK, CLK# and RESET#. Data is...
Description	SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48 0.240 INCH, 0.50 MM PITCH, TSSOP-48 DDR 14-Bit Registered Buffer 复员14位注册缓冲区
File Size	112.85K / 8 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICSSSTV16859 ICSSSTV16859YK
OCR Text	...ory Modules Product Features: * differential clock signals * Meets SSTL_2 signal data * Supports SSTL_2 class II specifications on outputs *...LVCMOS. Data flow from D to Q is controlled by the differential clock, CLK, CLK# and RESET#. Data is...
Description	DDR 13-Bit to 26-Bit Registered Buffer
File Size	231.88K / 8 Page	View it Online	Download Datasheet

				IDT[Integrated Device Technology] Integrated Device Technology, Inc.
Part No.	IDT74SSTV16857 IDT74SSTV16857PA IDT74SSTV16857PAG IDT74SSTV16857PAG8 IDT74SSTV16857PA8
OCR Text	...ss II style data inputs/outputs differential CLK input RESET control compatible with LVCMOS levels Flow-through architecture for optimum PCB design Drive up to equivalent of 14 SDRAM loads Latch-up performance exceeds 100mA ESD >2000V per M...
Description	14-BIT REGISTERED BUFFER WITH SSTL I/O
File Size	52.38K / 6 Page	View it Online	Download Datasheet

				MAXIM - Dallas Semiconductor MAXIM[Maxim Integrated Products]
Part No.	MAX9115 MAX9115EXK-T
OCR Text	differential signaling (LVDS) line receiver ideal for applications requiring high data rates, low power, and low noise. The device is guaran...LVCMOS output. The fail-safe feature sets the output high when the inputs are undriven and open, ter...
Description	Single LVDS Line Receiver in SC70
File Size	136.50K / 8 Page	View it Online	Download Datasheet

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