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  triple lvpecl-to-ecl translato Datasheet PDF File

For triple lvpecl-to-ecl translato Found Datasheets File :: 150+       Page :: | 1 | <2> | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |   

    MC10EP90 MC10EP90D MC100EP90

ONSEMI[ON Semiconductor]
Part No. MC10EP90 MC10EP90D MC100EP90
Description -3.3V / -5V triple ECL Input to LVPECL/PECL Output translator

File Size 68.83K  /  8 Page

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    MC10EP90-D

ON Semiconductor
Part No. MC10EP90-D
Description -3.3V / -5V triple ECL Input to LVPECL/PECL Output translator

File Size 68.27K  /  8 Page

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    MC100LVEL91-D

ON Semiconductor
Part No. MC100LVEL91-D
Description 3.3V / 5V triple LVPECL / PECL Input to -3.3V ECL Output translator

File Size 58.47K  /  8 Page

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    MC100EL91-D

ON Semiconductor
Part No. MC100EL91-D
Description 3.3V / 5V triple LVPECL / PECL Input to -5V ECL Output translator

File Size 57.64K  /  8 Page

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    Motorola
ONSEMI[ON Semiconductor]
Part No. AND8090 AND8090D MC100H601 MC100H601FN MC10H106FN NBSG111BA NBSG11BAR2 NBC12429FAR2 NBSG53ABAR2 MC100EP016AFAR2 MC100EP809FAR2 MC10SX1190 MC100LVE222 MC10EP451FAR2 NB100ELT23LDTR2 MC10EP131FA MC100LVEL30 MC10H165FNR2 MC100E210FN MC100EL12DT MC100EP105FAR2 MC10H106FNR2
Description 3.3V / 5V ECL Quad 2-Input Differential AND/NAND
5V ECL Low Impedance Driver
LOW VOLTAGE DUAL 1:4, 1:5 DIFFERENTIAL FANOUT BUFFER
8 Input Priority Encoder
3.3V ECL triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V Dual Differential LVPECL to LVTTL translator
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
Fibre Channel Coaxial Cable Driver and Loop Resillency Circuit
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
3.3V / 5V Programmable PLL Synthesized Clock Generator (25 to 400 MHz)
2.5 V/3.3 V SiGe 1:2 Differential Clock Driver with RSECL Outputs
2.5 V/3.3 V SiGe 1:10 Differential Clock Driver with RSECL Outputs
triple 4-3-3-Input NOR Gate
9-Bit ECL-TTL translator
AC Characteristics of ECL Devices

File Size 896.76K  /  20 Page

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    MAX9320B MAX9320BESA MAX9320BEUA MAX9320BESA-T

MAXIM INTEGRATED PRODUCTS INC
Maxim Integrated Products, Inc.
MAXIM[Maxim Integrated Products]
MAXIM - Dallas Semiconductor
Part No. MAX9320B MAX9320BESA MAX9320BEUA MAX9320BESA-T
Description LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver 1:2差分PECL/ECL/LVPECL/LVECL时钟和数据驱动器

File Size 117.69K  /  7 Page

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    MC100EP90DT MC100EP90DTG MC100EP90DTR2 MC100EP90DTR2G MC10EP9006 MC10EP90DTR2G MC100EP90 MC10EP90 MC10EP90DT MC10EP90DTG

ONSEMI[ON Semiconductor]
Part No. MC100EP90DT MC100EP90DTG MC100EP90DTR2 MC100EP90DTR2G MC10EP9006 MC10EP90DTR2G MC100EP90 MC10EP90 MC10EP90DT MC10EP90DTG MC10EP90DTR2
Description −3.3V / −5V triple ECL Input to LVPECL/PECL Output translator

File Size 133.78K  /  9 Page

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    ONSEMI[ON Semiconductor]
Part No. MC100LVEL90DW MC100LVEL9006 MC100LVEL90DWR2 MC100LVEL90DWR2G MC100LVEL90DWG MC100LVEL90
Description −3.3V / −5V triple ECL Input to LVPECL Output translator

File Size 109.67K  /  6 Page

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    ONSEMI[ON Semiconductor]
Part No. MC100LVEL91DW MC100LVEL9106 MC100LVEL91DWR2 MC100LVEL91DWR2G MC100LVEL91DWG MC100LVEL91
Description 3.3 V triple LVPECL Input to −3.3 V to −5.0 V ECL Output translator

File Size 108.49K  /  6 Page

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    MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR2 MC10H640FNR2 MC10EP131FAR2 MC100EP33 MC10H102MEL MC100LVEL29 MC100EP

ON Semiconductor
Part No. MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR2 MC10H640FNR2 MC10EP131FAR2 MC100EP33 MC10H102MEL MC100LVEL29 MC100EP116FA MC100EP90
Description 5V Dual Differential PECL to TTL translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V triple ECL Input to LVPECL/PECL Output translator

File Size 78.90K  /  10 Page

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For triple lvpecl-to-ecl translato Found Datasheets File :: 150+       Page :: | 1 | <2> | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |   

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