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					Cypress Semiconductor Corp.
Part No.	CY7C1241V18 CY7C1243V18 CY7C1241V18-300BZC CY7C1241V18-300BZI CY7C1241V18-300BZXC CY7C1241V18-300BZXI CY7C1243V18-300BZI CY7C1245V18-300BZI CY7C1256V18-300BZI CY7C1243V18-300BZC CY7C1245V18-300BZXI CY7C1245V18-300BZXC CY7C1243V18-300BZXI CY7C1243V18-300BZXC CY7C1245V18-300BZC
OCR Text	...y Maximum Operating Current 375 1240 333 MHz 333 1120 300 MHz 300 1040 Unit MHz mA Note 1. The QDR consortium specification for VDDQ is 1...Bytes not written remain unaltered. CY7C1256V18 - BWS0 controls D[8:0] CY7C1243V18 - BWS0 controls D...
Description	36-Mbit QDRII SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 36兆位的国防评估报告⑩- II SRAM4字突发架构（2.0周期读写延迟
File Size	1,036.02K / 28 Page	View it Online	Download Datasheet

					Cypress Semiconductor
Part No.	CY7C1510AV1807
OCR Text	... x8 x9 x18 x36 250 MHz 250 1230 1240 1350 1560 200 MHz 200 1005 1015 1105 1280 167 MHz 167 850 860 935 1090 Unit MHz mA Cypress Semicondu...Bytes not written remain unaltered. CY7C1525AV18 - BWS0 controls D[8:0]. CY7C1512AV18 - BWS0 control...
Description	72-Mbit QDR⑩-II SRAM 2-Word Burst Architecture
File Size	409.38K / 28 Page	View it Online	Download Datasheet

					Cypress Semiconductor
Part No.	CY7C1276V18-375BZC CY7C1276V18-333BZC CY7C1276V18-375BZI CY7C1276V18-300BZI CY7C1276V18-333BZXI CY7C1276V18-300BZC CY7C1276V18-300BZXI CY7C1276V18-300BZXC CY7C1276V18-333BZXC CY7C1276V18-333BZI CY7C1263V18 CY7C1263V18-300BZC CY7C1263V18-300BZI CY7C1263V18-300BZXC CY7C1263V18-300BZXI CY7C1263V18-333BZC CY7C1263V18-333BZI CY7C1263V18-333BZXC CY7C1263V18-333BZXI CY7C1263V18-375BZC CY7C1263V18-375BZI CY7C1263V18-375BZXC CY7C1263V18-375BZXI CY7C1263V18-400BZC CY7C1263V18-400BZI CY7C1263V18-400BZXC CY7C1263V18-400BZXI CY7C1265V18-333BZC CY7C1261V18-333BZC CY7C1261V18-375BZC CY7C1265V18-375BZC CY7C1261V18-300BZI CY7C1265V18-300BZI CY7C1261V18-400BZI CY7C1265V18-400BZI CY7C1265V18-300BZC CY7C1261V18-300BZC CY7C1265V18-400BZC CY7C1276V18-400BZC CY7C1261V18-400BZC CY7C1276V18-375BZXC
OCR Text	...maximum operating current 1330 1240 1120 1040 ma note 1. the qdr consortium specification for v ddq is 1.5v + 0.1v. the cypress qdr devic...bytes not written remain unaltered. cy7c1276v18 ? bws 0 controls d [8:0] cy7c1263v18 ? bws 0 contr...
Description	36-Mbit QDR?II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
File Size	1,101.64K / 28 Page	View it Online	Download Datasheet

					Cypress Semiconductor
Part No.	CY7C1261V18 CY7C1261V18-300BZC CY7C1261V18-300BZI CY7C1261V18-300BZXC CY7C1261V18-300BZXI CY7C1261V18-333BZC CY7C1261V18-333BZI CY7C1261V18-333BZXC CY7C1261V18-333BZXI CY7C1261V18-375BZC CY7C1261V18-375BZI CY7C1261V18-375BZXC CY7C1261V18-375BZXI CY7C1261V18-400BZC CY7C1261V18-400BZI CY7C1261V18-400BZXC CY7C1261V18-400BZXI CY7C1263V18 CY7C1263V18-300BZC CY7C1263V18-300BZI CY7C1263V18-300BZXC CY7C1263V18-300BZXI CY7C1263V18-333BZC CY7C1263V18-333BZI CY7C1263V18-333BZXC CY7C1263V18-333BZXI CY7C1263V18-375BZC CY7C1263V18-375BZI CY7C1263V18-375BZXC CY7C1263V18-375BZXI CY7C1276V18 CY7C1276V18-300BZC CY7C1276V18-300BZI CY7C1276V18-300BZXC CY7C1276V18-300BZXI CY7C1276V18-333BZC CY7C1276V18-333BZI CY7C1276V18-333BZXI CY7C1276V18-375BZC CY7C1276V18-375BZI CY7C1276V18-375BZXC CY7C1276V18-375BZXI CY7C1263V18-400BZC CY7C1263V18-400BZI CY7C1263V18-400BZXC CY7C1263V18-400BZXI CY7C1265V18-333BZC
OCR Text	...ng Current 400 1330 375 MHz 375 1240 333 MHz 333 1120 300 MHz 300 1040 Unit MHz mA Note 1. The QDR consortium specification for VDDQ is 1...Bytes not written remain unaltered. CY7C1276V18 - BWS0 controls D[8:0] CY7C1263V18 - BWS0 controls D...
Description	36-Mbit QDR⑩-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 36-Mbit QDR垄芒-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
File Size	1,096.09K / 28 Page	View it Online	Download Datasheet

					Zoran Corporation
Part No.	ZR36057 ZR36057PQC
OCR Text	... (408) 986-1314 T FAX (408) 986-1240 August 1996 Enhanced PCI Bus Multimedia Controller Enhanced PCI Bus Multimedia Controller Featur...Bytes Mapping in Code-Write Operations. . . . . . 14 PostOffice Operations . . . . . . . . . . . . ....
Description	ENHANCED PCI BUS MULTIMEDIA CONTROLLER
File Size	617.08K / 48 Page	View it Online	Download Datasheet

					Pericom Technology PERICOM[Pericom Semiconductor Corporation]
Part No.	PI90SD1636AFDE PI90SD1636A PI90SD1636AFC PI90SD1636AFCE PI90SD1636AFD
OCR Text	...MHz) Min. 124.0 Max. 126.0 Min. 1240 SerialBaud Rate (Mbaud) Max. 1260 Table 5. AC Electrical Characteristics TA = 0C to +70C, VCC = 3.15V to 3.45V Symbol tr,REFCLK tf,REFCLK tr,TTL_IN tf,TTL_IN tr,TTL_OUT tf,TTL_OUT trs,HS_OUT tfs,HS_O...
Description	SERDES Gigabit Ethernet Transceiver
File Size	329.61K / 15 Page	View it Online	Download Datasheet

					Cypress Semiconductor
Part No.	CY7C1510AV18
OCR Text	...current x8 1230 1005 850 ma x9 1240 1015 860 x18 1350 1105 935 x36 1560 1280 1090 [+] feedback cy7c1510av18, cy7c1525av18 cy7c1512av18...bytes not written remain unaltered. cy7c1525av18 ? bws 0 controls d [8:0]. cy7c1512av18 ? bws 0...
Description	72-Mbit QDR-II SRAM 2-Word Burst Architecture
File Size	452.73K / 28 Page	View it Online	Download Datasheet

					Cypress Semiconductor
Part No.	CY7C1241V18-300BZXC CY7C1256V18 CY7C1256V18-300BZC CY7C1256V18-300BZI CY7C1256V18-300BZXC CY7C1256V18-300BZXI CY7C1241V18-300BZI CY7C1245V18-300BZI CY7C1243V18-300BZI CY7C1243V18-300BZC CY7C1241V18-300BZC CY7C1245V18-300BZC CY7C1245V18-300BZXC CY7C1245V18-300BZXI
OCR Text	...y Maximum Operating Current 375 1240 333 MHz 333 1120 300 MHz 300 1040 Unit MHz mA Note 1. The QDR consortium specification for VDDQ is 1...Bytes not written remain unaltered. CY7C1256V18 - BWS0 controls D[8:0] CY7C1243V18 - BWS0 controls D...
Description	36-Mbit QDR垄芒-II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 36-Mbit QDR??II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 36-Mbit QDR?II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
File Size	1,101.30K / 28 Page	View it Online	Download Datasheet

					Cypress Semiconductor, Corp.
Part No.	CY7C1263V18-300BZI
OCR Text	...maximum operating current 1330 1240 1120 1040 ma note 1. the qdr consortium specification for v ddq is 1.5v + 0.1v. the cypress qdr devic...bytes not written remain unaltered. cy7c1276v18 ? bws 0 controls d [8:0] cy7c1263v18 ? bws 0 contr...
Description	36-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 18 QDR SRAM, 0.45 ns, PBGA165
File Size	434.14K / 29 Page	View it Online	Download Datasheet

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