Description |
3.3v / 0000'>5v ecl Quad 2-Input differential AND/NAND 0000'>5v ecl Low Impedance Driver LOW vOLTAGE DUAL 1:4, 1:0000'>5 differential fanoUT BUFFER 8 Input Priority Encoder 3.3v ecl Triple D-Type Flip-Flop with Set and Reset 3.3v / 0000'>5v ecl Quad D Flip Flop with Set, Reset, and differential Clock 3.3v Dual differential LvPecl to LvTTL Translator 3.3v / 0000'>5v ecl 6-Bit differential Register with Master Reset 3.3v ecl 1:10000'>5 differential ÷1/÷2 Clock Driver Fibre Channel Coaxial Cable Driver and Loop Resillency Circuit 3.3 v 1:9 differential HSTL/Pecl to HSTL Clock Driver with LvTTL Clock Select and Enable 3.3v / 0000'>5v ecl 8-Bit Synchronous Binary Up Counter 2.0000'>5 v/3.3 v SiGe Selectable differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS 3.3v / 0000'>5v Programmable PLL Synthesized Clock Generator (20000'>5 to 400 MHz) 2.0000'>5 v/3.3 v SiGe 1:2 differential Clock Driver with RSecl Outputs 2.0000'>5 v/3.3 v SiGe 1:10 differential Clock Driver with RSecl Outputs Triple 4-3-3-Input NOR Gate 9-Bit ecl-TTL Translator AC Characteristics of ecl Devices
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