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Actel
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| Part No. |
A32100DX
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| OCR Text |
...vice sizes from 1,200 to 20,000 gates ? up to 6 fast, low-skew clock networks ? up to 202 user-programmable i/o pins ? more than 500 macro functions ? up to 1,276 dedicated flip-flops ? i/o drive to 10 ma ? devices available to dscc smd ? ... |
| Description |
HiRel FPGAs
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| File Size |
564.54K /
98 Page |
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| OCR Text |
...apacity ? 2,500 to 30,000 logic gates ? up to 3kbits configurable dual-port sram ? fast wide-decode circuitry ? up to 250 user-programmable i/o pins high performance ? 225 mhz performance ? 5 ns dual-port sram access ? 100 mhz fifos ? 7.5 ... |
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| File Size |
599.25K /
84 Page |
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Xilinx
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| Part No. |
XC2V2000
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| OCR Text |
...densities from 40k to 8m system gates - 420 mhz internal clock speed (advance data) - 840+ mb/s i/o (advance data) selectram? memory hierarchy - 3 mb of dual-port ram in 18 kbit block selectram resources - up to 1.5 mb of distributed sel... |
| Description |
(XC2Vxxx) Virtex-II Platform FPGAs: Complete Data Sheet
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| File Size |
1,725.73K /
311 Page |
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... external low-cost nfet switch gates above the supply rail by 5.3v. these ic's can be biased from any supply 5v down to 1.5v. individual product descriptions are below. the four channel isl6123 (enable input), isl6124 (enable# input... |
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| File Size |
562.93K /
16 Page |
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...ond cycle begins the mce signal gates a mas- ter priority interrupt controllers (pic) cascade address onto the processors local bus where ale (address latch enable) strobes it into the address latches. on the leading edge of the second inte... |
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| File Size |
130.25K /
10 Page |
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Price and Availability
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