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Part No. NSC04944
OCR Text ...ow ground. The buffer drives 10 individual comparators referenced to the precision divider. Indication non-linearity can thus be held typically to 12%, even over a wide temperature range. Versatility was designed into the LM3914 so that con...
Description From old datasheet system

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Part No. NSC05169
OCR Text ...E Std. 1149.1 compliant when an individual 'PSC110F is selected. A one bit register that is placed at the end of each local scan port scan-chain. The PAD bit eliminates the prop delay that would be added by the 'PSC110F LSPN logic between T...
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Part No. ON0643
OCR Text ...t Pulldown Resistors Common and individual Enable/Disable Control High Bandwidth Output Transistors Extended 100E VEE Range of -4.2V to -5.46V FN SUFFIX PLASTIC PACKAGE CASE 776-02 The E211 features a multiplexed clock input to allow fo...
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Part No. ON1045
OCR Text ...lel control of the load and the individual output diagnostic is done through a SPI. The diagnostic logic recognizes 4 failure types at each output stage the overcurrent, the short to GND, the openload and the over-temperature. RDSON of 250...
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    Atmel Corp.
Part No. ATF1500A ATF1500AL
OCR Text ...gurable Flip Flops - Global and individual Register Control Signals - Global and individual Output Enable - Programmable Output Slew Rate Advanced Power Management Features - Automatic 3 mA Stand-By (ATF1500AL) - Pin-controlled 10 mA Standb...
Description High-performance EE PLD(高性能可电擦除的可编程逻辑器件)
From old datasheet system

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Part No. ATF1500ABV
OCR Text ...gurable Flip-flops - Global and individual Register Control Signals - Global and individual Output Enable - Programmable Output Slew Rate Advanced Power Management Features - Pin-controlled 5 A Standby Mode (Typical) - Programmable Pin-keep...
Description From old datasheet system

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Part No. ON2856
OCR Text ...dge-triggered D flip-flops with individual D inputs and Q and Q outputs. The Clock and Master Reset are common. The four flip-flops will store the state of their individual D inputs on the LOW to HIGH Clock (CP) transition, causing individu...
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Part No. PI5V332Q
OCR Text ...stance Wideband/Video Quad with individual Control Product Features: High-performance, low-cost solution to switch between video sources Wide bandwidth: 250 MHz Low ON-resistance: 3ohm Low crosstalk at 10 MHz: 58 dB Ultra-low qui...
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    Alliance Semiconductor, Corp.
ALSC[Alliance Semiconductor Corporation]
Part No. AS7C3364PFS32-36BV.1.4 AS7C3364PFS36B-200TQIN AS7C3364PFS32B AS7C3364PFS32B-133TQC AS7C3364PFS32B-133TQCN AS7C3364PFS32B-133TQI AS7C3364PFS32B-133TQIN AS7C3364PFS32B-166TQC AS7C3364PFS32B-166TQCN AS7C3364PFS32B-166TQI AS7C3364PFS32B-166TQIN AS7C3364PFS32B-200TQC AS7C3364PFS32B-200TQCN AS7C3364PFS32B-200TQI AS7C3364PFS32B-200TQIN AS7C3364PFS36B-133TQC AS7C3364PFS36B-133TQCN AS7C3364PFS36B-133TQI AS7C3364PFS36B-133TQIN AS7C3364PFS36B-166TQC AS7C3364PFS36B-166TQCN AS7C3364PFS36B-166TQI AS7C3364PFS36B-166TQIN AS7C3364PFS36B-200TQC AS7C3364PFS36B-200TQCN AS7C3364PFS36B-200TQI
OCR Text ...ar or interleaved burst control individual byte write and global write Snooze mode for reduced power-standby Common data inputs and data outputs Multiple chip enables for easy expansion 3.3V core power supply 2.5V or 3.3V I/O operation with...
Description 3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 36 STANDARD SRAM, 4 ns, PQFP100
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 32 STANDARD SRAM, 4 ns, PQFP100
From old datasheet system

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    Alliance Semiconductor, Corp.
ALSC[Alliance Semiconductor Corporation]
Part No. AS7C3364PFD32-36BV.1.1 AS7C3364PFD36B-200TQIN AS7C3364PFD32B AS7C3364PFD32B-133TQC AS7C3364PFD32B-133TQCN AS7C3364PFD32B-133TQI AS7C3364PFD32B-133TQIN AS7C3364PFD32B-166TQC AS7C3364PFD32B-166TQCN AS7C3364PFD32B-166TQI AS7C3364PFD32B-166TQIN AS7C3364PFD32B-200TQC AS7C3364PFD32B-200TQCN AS7C3364PFD32B-200TQI AS7C3364PFD32B-200TQIN AS7C3364PFD36B-133TQC AS7C3364PFD36B-133TQCN AS7C3364PFD36B-133TQI AS7C3364PFD36B-133TQIN AS7C3364PFD36B-166TQC AS7C3364PFD36B-166TQCN AS7C3364PFD36B-166TQI AS7C3364PFD36B-166TQIN AS7C3364PFD36B-200TQC AS7C3364PFD36B-200TQCN AS7C3364PFD36B-200TQI
OCR Text ...ar or interleaved burst control individual byte write and global write Snooze mode for reduced power-standby Common data inputs and data outputs Multiple chip enables for easy expansion 3.3V core power supply 2.5V or 3.3V I/O operation with...
Description 3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 36 STANDARD SRAM, 3 ns, PQFP100
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 32 STANDARD SRAM, 3.5 ns, PQFP100
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 32 STANDARD SRAM, 3 ns, PQFP100
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 36 STANDARD SRAM, 4 ns, PQFP100
From old datasheet system

File Size 528.83K  /  19 Page

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