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Intersil
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Part No. |
80C286/883
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OCR Text |
...s edge triggered after internal synchr onization. for proper recognition, the input must have been previously low for at leas t four system clock cycles and remain high for at least four system clock cycles. pereq peack 61 6 l o processor... |
Description |
Microprocessor, 16 Bit, CMOS, 883 Compliant, Process Speed 10 to 12.5MHz
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File Size |
743.96K /
60 Page |
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it Online |
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NanoAmp Solutions
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Part No. |
N16D1618LPA
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OCR Text |
...ese products are offering fully synchr onous operation and are referenced to a positive edge of the clock. all inputs and outputs are synchronized with the rising edge of the clock input. the data paths are internally pipelined to achiev... |
Description |
512K X 16 Bits X 2 Banks Low Power Synchronous DRAM
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File Size |
482.86K /
27 Page |
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it Online |
Download Datasheet |
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NanoAmp Solutions
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Part No. |
N16D1633LPA
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OCR Text |
...ese products are offering fully synchr onous operation and are referenced to a positive edge of the clock. all inputs and outputs are synchronized with the rising edge of the clock input. the data paths are internally pipelined to achiev... |
Description |
512K X 16 Bits X 2 Banks Low Power Synchronous DRAM
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File Size |
482.82K /
27 Page |
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it Online |
Download Datasheet |
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Intersil
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Part No. |
EL7554
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OCR Text |
...t; tied to regulator output to synchr onize start-up with a second supply; leave open for standalone operation; 2a internal pull-up current 26 stn auxiliary supply tracking negative input; connect to output of a second supply to synchron... |
Description |
PWM, Synchronous 4A Converter with % Voltage Margining and Power Sequencing
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File Size |
1,992.91K /
14 Page |
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it Online |
Download Datasheet |
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Price and Availability
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