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Alliance Semiconductor, Corp. ALSC[Alliance Semiconductor Corporation]
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Part No. |
AS7C4096 AS7C34096-15JC AS7C34096-10JC AS7C34096-10JCN AS7C34096-12 AS7C34096-12JI AS7C34096-12JIN AS7C34096-12TC AS7C34096-12TCN AS7C34096-12TI AS7C34096-12TIN AS7C34096-15JI AS7C34096-15JIN AS7C34096-15TI AS7C34096-20 AS7C34096-20JI AS7C34096-20JIN AS7C34096-20TC AS7C34096-20TCN AS7C34096-12JCN AS7C34096-15 AS7C34096-15JCN AS7C34096-15TC AS7C34096-15TCN AS7C34096-15TIN AS7C34096-10TC AS7C34096-10TCN AS7C34096-12JC AS7C34096-20JC AS7C34096-20JCN AS7C34096-10 AS7C4096-20JC AS7C4096-20JCN AS7C4096-20JI AS7C4096-20JIN AS7C4096-12JC AS7C4096-12JCN AS7C4096-12JI AS7C4096-12JIN AS7C4096-15JC AS7C4096-15JCN AS7C4096-15JI AS7C4096-15JIN AS7C409610TC AS7C34096-20TI AS7C34096-20TIN AS7C409610JC AS7C4096-12 AS7C4096-12TC AS7C4096-12TCN AS7C4096-12TI AS7C4096-12TIN AS7C4096-15 AS7C4096-15TC AS7C4096-15TCN AS7C4096-15TI AS7C4096-15TIN AS7C4096-20 AS7C4096-20TC AS7C4096-20TCN AS7C4096-20TI AS7C4096-20TIN AS7C4096-5JC
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Description |
5V/3.3V 512k x8 CMOS sram 512k x 8 STANDARD sram, 12 ns, PDSO36 High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Reset 16-TSSOP -55 to 125 512k x 8 STANDARD sram, 20 ns, PDSO44 High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Reset 16-TSSOP -55 to 125 512k x 8 STANDARD sram, 20 ns, PDSO36 Dual 4-Input Positive-AND Gate 14-TVSOP -40 to 85 512k x 8 STANDARD sram, 12 ns, PDSO44 Dual 4-Input Positive-AND Gate 14-SOIC -40 to 85 512k x 8 STANDARD sram, 12 ns, PDSO36 TV 12C 8#20 4#16 SKT PLUG 512k x 8 STANDARD sram, 10 ns, PDSO36 Dual 4-Input Positive-AND Gate 14-TSSOP -40 to 85 512k x 8 STANDARD sram, 20 ns, PDSO44 DUAL MONOSTABLE MULTIVIBRATORS 16-SOIC -40 to 85 512k x 8 STANDARD sram, 20 ns, PDSO44 Dual 4-Input Positive-AND Gate 14-SO -40 to 85 512k x 8 STANDARD sram, 15 ns, PDSO36 Dual 4-Input Positive-AND Gate 14-TSSOP -40 to 85 512k x 8 STANDARD sram, 15 ns, PDSO44 TV 26C 26#20 PIN WALL RECP 512k x 8 STANDARD sram, 10 ns, PDSO44 TV 5C 5#16 PIN WALL RECP sram - 5V Fast Asynchronous
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File Size |
210.14K /
9 Page |
View
it Online |
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Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
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Part No. |
CY7C1371D-100AxI CY7C1371D-100BGI CY7C1373D-100BZI CY7C1373D-133AxI CY7C1371D-100BZC CY7C1371D-100BZI CY7C1373D-100AxC CY7C1373D-100AxI CY7C1371D-100AxC CY7C1373D-133AxC CY7C1371D-133AxI CY7C1373D-100BZC CY7C1371D-133BGC CY7C1371D-133BGI CY7C1371D-133AxC CY7C1373D-100BGC CY7C1373D-133BGC CY7C1373D-133BGxI CY7C1373D-133BZxC CY7C1373D-133BZxI CY7C1373D-133BZI CY7C1373D-133BGxC CY7C1373D-133BZC CY7C1371D-133BGxC CY7C1371D-100BGxI ICY7C1373D-100BGxI CY7C1373D-100BZxC CY7C1371D-100BZxC CY7C1371D-100BGC ICY7C1373D-100BGI
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Description |
18-Mbit (512k x 36/1M x 18) Flow-Through sram with NoBLTM Architecture 1M x 18 zbt sram, 8.5 ns, pqfp100 18-Mbit (512k x 36/1M x 18) Flow-Through sram with NoBLTM Architecture 18兆位(为512k × 36/1M × 18)流体系结构,通过与NoBLTM的sram 18-Mbit (512k x 36/1M x 18) Flow-Through sram with NoBLTM Architecture 1M x 18 zbt sram, 8.5 ns, PBGA165 18-Mbit (512k x 36/1M x 18) Flow-Through sram with NoBLTM Architecture 1M x 18 zbt sram, 6.5 ns, PBGA119 18-Mbit (512k x 36/1M x 18) Flow-Through sram with NoBLTM Architecture 512k x 36 zbt sram, 8.5 ns, PBGA165 18-Mbit (512k x 36/1M x 18) Flow-Through sram with NoBLTM Architecture 1M x 18 zbt sram, 6.5 ns, pqfp100 18-Mbit (512k x 36/1M x 18) Flow-Through sram with NoBLTM Architecture 1M x 18 zbt sram, 6.5 ns, PBGA165 18-Mbit (512k x 36/1M x 18) Flow-Through sram with NoBLTM Architecture 512k x 36 zbt sram, 8.5 ns, PBGA119
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File Size |
449.66K /
30 Page |
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Download Datasheet
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Part No. |
CAT64LC20J CAT64LC40J CAT64LC10PI CAT64LC40SA CAT64LC40SI CAT64LC20SI CAT64LC20JI CAT64LC20PI
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Description |
18-Mbit (512k x 36/1Mbit x 18) Pipelined Register-Register Late Write 36-Mbit DDR-II sram 2-Word Burst Architecture 9-Mbit QDR- II53; sram 2-Word Burst Architecture 36-Mbit DDR-II sram 2-Word Burst Architecture (2.5 Cycle Read Latency) 36-Mbit (1M x 36/2M x 18/512k x 72) Pipelined sram with NoBL53; Architecture 36 Mbit (1M x 36/2 M x 18/512k x 72) Flow-Through sram with NoBL53; Architecture SPI Serial EEPROM 4-Mbit (128K x 36) Pipelined Sync sram 9-Mbit (256K x 36/512k x 18) Pipelined sram
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File Size |
87.91K /
9 Page |
View
it Online |
Download Datasheet
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Price and Availability
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