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				Epson Company
Part No.	SED1353
OCR Text	...IOR# IOW# VCS0# VCS1# VA0-12 64 Kbit CS# 64 Kbit CS# Note: Example implementation, actual may vary. Interface with 8-Bit Z80 MPU and 16K bytes SRAM (2 of 8K x 8) Z80 MREQ# MI# IORQ# A0 to A15 D0 to D7 WAIT# WR# RD# Decoder ...
Description	SED1353 GRAPHICS LCD CONTROLLER
File Size	409.23K / 30 Page	View it Online	Download Datasheet

				STMICROELECTRONICS[STMicroelectronics]
Part No.	STA016 STA016A
OCR Text	...VDD_5 VSS_9 SDA SCL 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 CD_LRCK CD_BCK CD_SDI DREQ VDD_1 VSS_1 BS_LRCK BS_BCK BS_SDI VDD_2 VSS_2 LRCK1 BCKI SDI RESET TESTEN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 IODATA12 IODATA11 IO...
Description	MPEG 2.5 LAYER III AUDIO DECODER SUPPORTING CD-ROM CAPABILITY
File Size	212.68K / 43 Page	View it Online	Download Datasheet

				Electronic Theatre Controls, Inc. ETC[ETC] Micro Analog systems
Part No.	MAS7838 MAS7838N MAS7838S MAS7838S-T
OCR Text	...nd v) * Transmission rate up to 64 kbit/s * CMOS compatible interface * Low power consumption (typically 25 mW) * No additional circuitry required to perform the conversion * CMOS device * Single =5V supply $33/,&$7,21 * * * Adapts asyn...
Description	SYNCHRONOUS TO ASYNCHRONOUS CONVERTER SAC CMOS 转炉同步的异步国资委的CMOS
File Size	110.05K / 9 Page	View it Online	Download Datasheet

				PMC-Sierra Inc PMC-Sierra, Inc.
Part No.	PM7364
OCR Text	...maximum aggregate clock rate is 64 MHz. When the device is interfaced to two T3 or HSSI links, the maximum aggregate clock rate is 104 MHz. ...Kbit/s to 52 Mbit/s. * Supports 32 full-duplex and independently-timed links. * Supports 128 full-du...
Description	Frame Engine and Datalink Manager
File Size	37.22K / 2 Page	View it Online	Download Datasheet

				PHILIPS[Philips Semiconductors]
Part No.	SAA7221 SAA7221HS SAA7215 SAA7215HS SAA7216 SAA7216HS SAA7221HS_C1 SAA7215HS_C2 SAA7216HS_C1
OCR Text	...grammable buffer size, at least 64 kbit is available * Synchronization modes: PTS controlled, PTS free running, software controlled, buffer controlled * PTS register can be set via external controller; programmable processing delay compensa...
Description	Integrated MPEG AVGD decoders
File Size	101.07K / 28 Page	View it Online	Download Datasheet

				NXP Semiconductors PHILIPS[Philips Semiconductors]
Part No.	SAA7212 SAA7212H
OCR Text	...grammable buffer size, at least 64 kbit is available. * Synchronization modes: PTS controlled, PTS free running, software controlled, buffer controlled * PTS register can be set via external controller 1998 Sep 07 3 SAA7212 * Programmab...
Description	Integrated MPEG AVG decoder
File Size	93.64K / 20 Page	View it Online	Download Datasheet

				STMICROELECTRONICS[STMicroelectronics]
Part No.	PSD835F1-12B81 PSD835F1-12B81I PSD835F1-12J PSD835F1-12JI PSD835F1-12M PSD835F1-12MI PSD835F1-12U PSD835F1-12UI PSD835F1-15B81 PSD835F1-15B81I PSD835F1-15J PSD835F1-15JI PSD835F1-15M PSD835F1-15MI PSD835F1-15U PSD835F1-15UI PSD835F1-20B81 PSD835F1-20B81I PSD835F1-20J PSD835F1-20JI PSD835F1-20M PSD835F1-20MI PSD835F1-20U PSD835F1-20UI PSD835F1-70B81 PSD835F1-70B81I PSD835F1-70J PSD835F1-70JI PSD835F1-70M PSD835F1-70U PSD835F1-70UI PSD835F1-90B81 PSD835F1-90B81I PSD835F1-90J PSD835F1-90JI PSD835F1-90M PSD835F1-90MI PSD835F1-90U PSD835F1-A-12B81I PSD835F1-A-12J PSD835F1-A-12JI PSD835F1-A-12M PSD835F1-A-12MI PSD835F1-A-12U PSD835F1-A-12UI PSD835F1-A-15B81 PSD835F1-A-15B81I PSD835F1-A-15J PSD835F1-A-15JI PSD835F1-A-15M PSD835F1-A-15MI PSD835F1-A-15UI PSD835F1-A-20B81 PSD835F1-A-20B81I PSD835F1-A-20J PSD835F1-A-20JI PSD835F1-A-20M PSD835F1-A-20MI PSD835F1-A-20U PSD835F1-A-20UI PSD835F1-A-70B81 PSD835F1-A-70B81I PSD835F1-A-70J PSD835F1-A-70JI PSD835F1-A-70M PSD835F1-A-70MI PSD835F1-A-70UI PSD835F1-A-90B81 PSD835F1-A-90B81I PSD835F1-A-90J PSD835F1-A-90JI PSD835F1-A-90M PSD835F1-A-90MI PSD835F1-A-90U PSD835F1-A-90UI PSD835F1-B-12B81 PSD835F1-B-12B81I PSD835F1-B-12J PSD835F1-B-12JI PSD835F1-
OCR Text	...emory (4 uniform sectors) Up to 64 Kbit SRAM Over 3,000 Gates of PLD: DPLD and CPLD 52 Reconfigurable I/O ports Enhanced JTAG Serial Port Programmable power management High Endurance: - 100,000 Erase/Write Cycles of Flash Memory - 1,000 Era...
Description	Configurable Memory System on a Chip for 8-Bit Microcontrollers
File Size	564.49K / 110 Page	View it Online	Download Datasheet

				STMICROELECTRONICS[STMicroelectronics]
Part No.	STA015 STA015B STA015T
OCR Text	...A UP TO 5Mbit/s (TQFP44 & LFBGA 64) DIGITAL VOLUME BASS & TREBLE CONTROL SERIAL BITSTREAM INPUT INTERFACE EASY PROGRAMMABLE ADC INPUT INTERF...Kbit/sec) depending on the MPEG ID. bitrate index '0000' '0001' '0010' '0011' '0100' '0101' '0110' ...
Description	MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM CAPABILITY
File Size	274.89K / 44 Page	View it Online	Download Datasheet

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