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SHANGHAI BELLING CO., L...
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Part No. |
BL55077A
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OCR Text |
... v1. 0 810 yishan rd., shanghai, china. zip : 200233 tel: 021 - 24261000 w w w . b e l l i n g . c o m . c n ...12 sync cascade synchronization clock 13 clk external clock input 14 vdd supply ... |
Description |
LCD Driver for 160 Display Units BL55077
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File Size |
938.09K /
10 Page |
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ICST[Integrated Circuit Systems] Integrated Device Technology, Inc.
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Part No. |
ICS9248-99 ICS9248YF-99 AV9248F-99
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OCR Text |
...IIITM
Recommended Application: 810/810E style chipset Output Features: * 2- CPUs @2.5V @ 150MHz (up to 200MHz. achievable through I2C) * 9 ...12 19, 18, 17, 15, 14 21, 22 23 25 28 29 31, 32, 33, 35, 36, 37, 39, 40, 41 43 44, 45 46 47 48 PIN N... |
Description |
Frequency generator and integrated buffer for Celeron and PII/III Frequency Generator & Integrated Buffers for Celeron & PII/III?/a> Frequency Generator & Integrated Buffers for Celeron & PII/III⑩ 16-Bit Transparent D-Type Latches With 3-State Outputs 48-SSOP -40 to 85 频率发生
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File Size |
448.05K /
13 Page |
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it Online |
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Samsung Electronic
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Part No. |
M374S3253CTU
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OCR Text |
... 3 t rc (min) i o = 0 ma 900 810 810 810 ma 1 precharge standby cur- rent in power-down mode i cc2 p cke v il (max), t cc = 10ns 18 m...12 clk to valid output delay cas latency=3 t sac 5.4 5.4 6 6 ns 1,2 cas latency=2 5.4 6 6 7 output d... |
Description |
32Mx72 SDRAM DIMM with ECC based on 32Mx8, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD Data Sheet
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File Size |
146.94K /
11 Page |
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3M Company
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Part No. |
ICS9248YF-99 ICS9248YF-99LF
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OCR Text |
810/810e style chipset output features: 2- cpus @2.5v @ 150mhz (up to 200mhz. achievable through i 2 c) 9 - sdram @ 3.3v @ 150mhz (up to...12 10
3 ics9248-99 0314c?09/18/03 1. the ics clock generator is a slave/receiver, i 2 c component... |
Description |
150.29 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, SSOP-48
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File Size |
254.98K /
13 Page |
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it Online |
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Samsung Electronic
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Part No. |
M374S3253CTS
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OCR Text |
... 3 t rc (min) i o = 0 ma 900 810 810 810 ma 1 precharge standby cur- rent in power-down mode i cc2 p cke v il (max), t cc = 10ns 18 m...12 clk to valid output delay cas latency=3 t sac 5.4 5.4 6 6 ns 1,2 cas latency=2 5.4 6 6 7 output d... |
Description |
32Mx72 SDRAM DIMM with ECC based on 32Mx8, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD Data sheet
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File Size |
147.05K /
11 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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