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AD588JQ ANTXV1N 4027B BC856B GC140R 2SD789 320LF UFR8780
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    MT8924 MT8924AS MT8924AE

Mitel Networks Corporat...
MITEL[Mitel Networks Corporation]
Part No. MT8924 MT8924AS MT8924AE
OCR Text ...data from the PCM input port is converted to linear format, processed by a dedicated arithmetic unit, re-converted to companded format and then sent to the PCM output port.The PCM output signal contains all the information of each channel c...
Description PCM Conference Circuit (PCC) Preliminary Information

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    MT8950 MT8950AC

Mitel Semiconductor
MITEL[Mitel Networks Corporation]
Part No. MT8950 MT8950AC
OCR Text ... the NRZ format , is internally converted to inverted NRZ and appears on this open drain output. This output in conjunction with the SPi input can be used for long space detection. Ground (0 Volt). Secondary Clock (TTL Input) - This is an e...
Description ISO-CMOS ST-BUS⑩ FAMILY Data Codec
ISO-CMOS ST-BUS FAMILY Data Codec
ISO-CMOS ST-BUS?/a> FAMILY Data Codec

File Size 222.80K  /  16 Page

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    TDA9816M

NXP Semiconductors
Part No. TDA9816M
OCR Text ...n, the agc capacitor voltage is converted to an internal if control signal and then fed to the tuner agc to generate the tuner agc output current at pin tagc (open-collector output). the tuner agc takeover point can be adjusted at pin tadj....
Description Multistandard multimedia IF-PLL and FM radio demodulator

File Size 296.38K  /  44 Page

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    TDA9812 TDA9812T

NXP Semiconductors
Part No. TDA9812 TDA9812T
OCR Text ...y detector or phase detector is converted into a dc voltage via the loop filter, which controls the vco frequency. in the event of positive modulated signals the phase detector is gated by composite sync in order to avoid signal distortion ...
Description Multistandard VIF-PLL and FM-PLL/AM demodulator

File Size 278.37K  /  32 Page

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    Analog Devices, Inc.
Part No. AD7861
OCR Text ...f 2, 3 or 4 channels per group. converted channel results are stored in registers and the data can be read in any order. the sampling and conversion time for two channels is 8 m s, three channels is 11.2 m s, and four channels is 14.4 m...
Description 11-Bit Resolution Simultaneous Sampling A/D Converter(同时采样11位A/D转换 11位分辨率同时采样的A / D转换器(同时采样11位的A / D转换器)

File Size 251.26K  /  6 Page

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    PCF26100 PCF26100ET

NXP Semiconductors
Part No. PCF26100 PCF26100ET
OCR Text ...ived from the jtag interface is converted and forwarded to the radio 3-wire s-bus interface. the timing control signals to the uaa3558 radio are generated in the pcf26100. for this a minimum number of reference timing signals from the baseb...
Description Bluetooth Adapter IC

File Size 121.64K  /  28 Page

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    International Business Machines, Corp.
Part No. IBM42P10SNYAA10 IBM42P12SNYAA10
OCR Text ...ceptacle. the optical signal is converted to an electrical signal, amplified and delivered to the host card. this module is designed to work with industry standard 10b seri- alizer/deserializer modules. the sff-pgg-1063/1250-sw/lw is a clas...
Description Gigabit Ethernet/Fibre Channel Small Form Factor Hot-Pluggable Transceiver(吉(10^ 9 G)位以太网/光纤通道热插收发 千兆以太光纤通道纤巧热插拔收发器(吉10 ^ 9政)位以太网/光纤通道热插收发器)

File Size 189.35K  /  34 Page

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    MPX2010 AN1668

Freescale Semiconductor, Inc
Part No. MPX2010 AN1668
OCR Text ...ows the mpx2010 with the errors converted to %v fss . the expected maximum root mean squared error of the sensor is = 7.19% fs. with auto-zeroing, the offset calibration, temperature effect on offset and offset stabilit y is reduced ...
Description Washing Appliance Sensor Selection

File Size 148.60K  /  6 Page

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    Atmel Corp.
Part No. AT86RF211S
OCR Text ...reshold l02 vcc gnd signal down-converted at 10.7 mhz 2 down-conversion at 455 khz 1st filtering stage 2nd filtering stage embedded function dataclk datamsg 10.7 mhz bandwidth = hundreds of khz 455 khz bandwidth = tens of khz f rf nd 0101...
Description Transceiver for ISM Radio Applications

File Size 121.88K  /  15 Page

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    Vitesse Semiconductor Corporation.
Part No. VSC8114QB VSC8114QB1 VSC8114QB2
OCR Text ... data input. the serial data is converted to byte-wide parallel data and presented on rxout[7:0] pins. a divide-by-8 version of the high-speed clock (rxlsckout) should be used to synchronize the byte-serial rxout[7:0] data with the receive ...
Description VGA TO VIDEO ULTIMATE PRO
VGA TO HDTV CONVERTER PLUS
COMPACT RGB SKEW COMPENSATOR

File Size 438.97K  /  24 Page

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