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IDT
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| Part No. |
IDT72V2103 IDT72V2113
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| OCR Text |
...nts of data and match busses of unequal sizes.
PIN CONFIGURATIONS
WCLK PRS MRS LD FWFT/SI FF/IR PAF OW FSEL0 HF FSEL1 BE IP VCC PAE PFM EF/OR RM RCLK REN 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
INDEX
WEN SEN DN... |
| Description |
3.3 VOLT HIGH-DENSITY SUPERSYNC II? NARROW BUS FIFO
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| File Size |
418.72K /
45 Page |
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it Online |
Download Datasheet
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Philips
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| Part No. |
SA58604
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| OCR Text |
...V1 attenuates more than V2. the unequal attenuation causes the signal to unbalance, which reduces CMR at high frequencies. This circuit provides excellent CMR in low voltage, single supply applications. The SA58601 has a internal shunt regu... |
| Description |
Dual and quad operational amplifiers
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| File Size |
123.97K /
14 Page |
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it Online |
Download Datasheet |
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IDT
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| Part No. |
IDT72T36105 IDT72T36115
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| OCR Text |
...nts of data and match busses of unequal sizes. Each FIFO has a data input port (Dn) and a data output port (Qn), both of which can assume either a 36-bit, 18-bit or a 9-bit width as determined by the state of external control pins Input Wid... |
| Description |
2.5 VOLT HIGH-SPEED TeraSync? FIFO 36-BIT CONFIGURATIONS
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| File Size |
530.30K /
57 Page |
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it Online |
Download Datasheet |
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IDT
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| Part No. |
IDT72V36100 72V3690
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| OCR Text |
...nts of data and match busses of unequal sizes. Each FIFO has a data input port (Dn) and a data output port (Qn), both of which can assume either a 36-bit, 18-bit or a 9-bit width as determined by the state of external control pins Input Wid... |
| Description |
3.3 VOLT HIGH-DENSITY SUPERSYNC™ II 36-BIT FIFO
From old datasheet system
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| File Size |
562.55K /
36 Page |
View
it Online |
Download Datasheet |
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IDT
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| Part No. |
IDT72T72115 IDT72T7295 IDT72T72105
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| OCR Text |
...nts of data and match busses of unequal sizes. Each FIFO has a data input port (Dn) and a data output port (Qn), both of which can assume either a 72-bit, 36-bit or a 18-bit width as determined by the state of external control pins Input Wi... |
| Description |
2.5 VOLT HIGH-SPEED TeraSync? FIFO 72-BIT CONFIGURATIONS
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| File Size |
517.07K /
53 Page |
View
it Online |
Download Datasheet |
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pmc
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| Part No. |
1991575
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| OCR Text |
...ert delay (R_CDVT) to allow for unequal spacing between cells. This is analogous to using a FIFO in an asynchronous path. What is the maximum cell arrival jitter that the reassembly process will tolerate without producing errors on the E1/D... |
| Description |
From old datasheet system
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| File Size |
488.24K /
23 Page |
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it Online |
Download Datasheet |
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IDT
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| Part No. |
IDT72V3680 IDT72V3670 IDT72V3690
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| OCR Text |
...nts of data and match busses of unequal sizes. Each FIFO has a data input port (Dn) and a data output port (Qn), both of which can assume either a 36-bit, 18-bit or a 9-bit width as determined by the state of external control pins Input Wid... |
| Description |
3.3V HIGH-DENSITY SUPERSYNC? II 36-BIT FIFO
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| File Size |
442.24K /
46 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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