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pll- Datasheet PDF File

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				Integrated Circuit Systems
Part No.	ICS9169CM-22
OCR Text	...ansitions without violating the pll timing of internal microprocessor clock multipliers. a raised frequency setting of 68.5 mhz is available for turbo-mode of the 66.8 mhz cpu. the ics9169c-232 contains 8 cpu clocks, 6 pci clocks, 1 re...
Description	Frequency generator for Pentium based system
File Size	334.86K / 8 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	NBC12439 NBC12439FA NBC12439FAR2 NBC12439FN NBC12439FNR2
OCR Text	PLL Synthesized Clock Generator 50 MHz to 800 MHz http://onsemi.com The NBC12439 is a general purpose, PLL based synthesized clock source. The VCO will operate over a frequency range of 400 MHz to 800 MHz. The VCO frequency is sent to ...
Description	3.3 V/5 V Programmable PLL Synthesized Clock Generator
File Size	143.17K / 20 Page	View it Online	Download Datasheet

				PHILIPS[Philips Semiconductors]
Part No.	P89C557E4 P89C557E4EBB P89C557E4EFB P83C557E4 P83C557E4EBB P83C557E4EFB P80C557E4EFB P80C557E4 P80C557E4EBB P80C557E4EFB/01
OCR Text	...d oscillator: 3.5 MHz to 16 MHz PLL oscillator with 32 kHz reference and software-selectable system clock frequency Seconds Timer Software enable/disable of ALE output pulse Electromagnetic compatibility improvements Wake-up from Power-down...
Description	P83C557E4/P80C557E4/P89C557E4; Single-chip 8-bit microcontroller
File Size	361.76K / 72 Page	View it Online	Download Datasheet

				SIEMENS[Siemens Semiconductor Group]
Part No.	Q67106-A8315 SLB0587G SLB0587 Q67100-A8310
OCR Text	...rogramming input Integrator for PLL Synchronizing input Sensor input Extension input Supply voltage Trigger pulse output Semiconductor Group 2 SLB 0587 Figure 1 Block Diagram Semiconductor Group 3 SLB 0587 Functional...
Description	From old datasheet system Dimmer IC for Halogen Lamps
File Size	865.47K / 22 Page	View it Online	Download Datasheet

				SIEMENS[Siemens Semiconductor Group] Infineon
Part No.	Q67106-H5157 SDA5649 SDA5649X Q67100-H5156
OCR Text	...utput from sync slicer used for PLL based clock generation. Not connected Data available output active low, when PDC/VPS data is received. Output signaling the presence of the first field active high. Test input; activates test mode when pu...
Description	From old datasheet system Expanded Decoder for Program Delivery Control and Video Program System EPDC / VPS Decoder
File Size	477.76K / 26 Page	View it Online	Download Datasheet

				TI store
Part No.	TPS54260DGQ
OCR Text	...stor in series 60 ns edge delay pll lock in time measured at 500 khz 100 m s slow start and tracking (ss/tr) charge current v ss/tr = 0.4 v 2 m a ss/tr-to-vsense matching v ss/tr = 0.4 v 45 mv ss/tr-to-reference crossover 98% nominal 1.15 v...
Description	<font color=red>[Old version datasheet]</font> 3.5V to 60V INPUT, 2.5A, STEP DOWN CONVERTER WITH ECO-MODE?
File Size	1,853.47K / 49 Page	View it Online	Download Datasheet

				Infineon SIEMENS[Siemens Semiconductor Group]
Part No.	Q67106-H5183 SDA5642-6 SDA5642-6X SDA5642X Q67100-H5182 SDA5642-6XGEG
OCR Text	...utput from sync slicer used for PLL based clock generation. Data available output active low, when VPS data is received. Output signaling the presence of the first field active high. Test input; activates test mode when pulled high. Connect...
Description	PDC Decoder VPS-Decoder VPS Decoder From old datasheet system
File Size	684.24K / 27 Page	View it Online	Download Datasheet

				SIEMENS[Siemens Semiconductor Group]
Part No.	Q67106-H6423 Q-67106-H6514 PMB2306 PMB2306R PMB2306T Q67100-H6423
OCR Text	pll-Frequency Synthesizer PMB2306R/PMB2306T Version 2.2 Data Sheet 02.97 T2306-0V22-D1-7600 30%530%7 5HYLVLRQ +LVWRU\ Previous Version: 01.94 Page Page (in previous (in new Version) Version) 14-15 19-20 &XUUHQW 9HUVLRQ Subjects (...
Description	pll-Frequency Synthesizer PMB2306R/PMB2306T Version 2.2
File Size	757.92K / 35 Page	View it Online	Download Datasheet

				ETC[ETC]
Part No.	QL8050 QL8150 QL8250 QL8025 QL8325
OCR Text	...VTTL, LVCMOS, LVCMOS18, PCI, PLL Embedded RAM Blocks Embeded Computational Units PLL GTL+, SSTL2, and SSTL3 Independent I/O Banks capable of Fabric supporting multiple standards in one device I/O Register Configuration...
Description	LOW POWER FPGA COMBINING PERFORMANCE DENSITY AND EMBEDED RAM
File Size	442.48K / 49 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	NBXSBB020
OCR Text	...al crystal and phase lock loop (pll) multiplier to provide 280 mhz, ultra low jitter and phase noise lvpecl differential output. this device is a member of on semiconductor?s pureedge clock family that provides accurate and precision clo...
Description	Crystal Oscillator Module, 3.3 V, 280 MHz PureEdge™ LVPECL
File Size	116.60K / 7 Page	View it Online	Download Datasheet

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