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IDT
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| Part No. |
IDT72V36110
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| OCR Text |
...nts of data and match busses of unequal sizes. Each FIFO has a data input port (Dn) and a data output port (Qn), both of which can assume either a 36-bit, 18-bit or a 9-bit width as determined by the state of external control pins Input Wid... |
| Description |
3.3 VOLT HIGH-DENSITY SUPERSYNC II? 36-BIT FIFO
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| File Size |
442.15K /
47 Page |
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it Online |
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IDT
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| Part No. |
IDT72V7250 IDT72V7240 IDT72V72100 IDT72V7230 IDT72V7290
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| OCR Text |
...nts of data and match busses of unequal sizes. Each FIFO has a data input port (Dn) and a data output port (Qn), both of which can assume either a 72-bit, 36-bit or a 18-bit width as determined by the state of external control pins Input Wi... |
| Description |
3.3 VOLT HIGH-DENSITY SUPERSYNC II? 72-BIT FIFO
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| File Size |
423.44K /
42 Page |
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it Online |
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IDT
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| Part No. |
IDT72T40108 IDT72T4088IDT72T4098 IDT72T4098
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| OCR Text |
...unts of data and match buses of unequal sizes. Each FIFO has a data input port (Dn) and a data output port (Qn), both of which can assume either a 40-bit, 20-bit, or a 10-bit width as determined by the state of external control pins Input W... |
| Description |
2.5 VOLT HIGH-SPEED TeraSync? DDR/SDR FIFO 40-BIT CONFIGURATION
2.5 VOLT HIGH-SPEED TeraSync™ DDR FIFO 40-BIT CONFIGURATION
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| File Size |
456.68K /
52 Page |
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it Online |
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MAXIM[Maxim Integrated Products]
MAXIM - Dallas Semiconductor
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| Part No. |
MAX6673 MAX6672 MAX6673AXK-T MAX6672AXK-T
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| OCR Text |
... capacitance becomes too large, unequal rise and fall times distort the pulse width, thus delivering inaccurate readings.
Applications Information
Pulse-Width Modulation
Interfacing with a C The Typical Application Circuit shows the MA... |
| Description |
PWM Output Temperature Sensors in SC70 Packages
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| File Size |
122.56K /
6 Page |
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it Online |
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Price and Availability
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