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Macronix International Co., Ltd.
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| Part No. |
MX23C8000 MX23C8000MC-10 MX23C8000MC-12 MX23C8000MC-15 MX23C8000MC-20 MX23C8000PC-10 MX23C8000PC-12 MX23C8000PC-15 MX23C8000PC-20 MX23C8000QC-10 MX23C8000QC-12 MX23C8000QC-15 MX23C8000QC-20 MX23C8000TC-10 MX23C8000TC-12 MX23C8000TC-15 MX23C8000TC-20
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| OCR Text |
...Output High Z Delay tLZ tHZ 0ns 20ns 0ns 20ns 0ns 20ns 0ns 20ns Note 3 Note 4 tACE tAOE 100ns 80ns 120ns 80ns 150ns 80ns 200ns 100ns SYMBOL tCYC tAA tOH MIN. MAX. 23C8000-12 MIN. 120ns 0ns MAX. 120ns 23C8000-15 MIN. 150ns 0ns MAX. 150ns 23C... |
| Description |
8M-BIT [1M x 8] CMOS MASK ROM 1M X 8 MASK PROM, 150 ns, PDIP32
8M-BIT [1M x 8] CMOS MASK ROM 1M X 8 MASK PROM, 120 ns, PDIP32
8M-BIT [1M x 8] CMOS MASK ROM 1M X 8 MASK PROM, 200 ns, PQCC32
8M-BIT [1M x 8] CMOS MASK ROM 1M X 8 MASK PROM, 100 ns, PQCC32
8M-BIT [1M x 8] CMOS MASK ROM 1M X 8 MASK PROM, 120 ns, PQCC32
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| File Size |
904.73K /
10 Page |
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it Online |
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MITSUBISHI[Mitsubishi Electric Semiconductor]
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| Part No. |
MH32S72APHB-8 MH32S72APHB-6 MH32S72APHB-7 B00007
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| OCR Text |
...-6 -7,-8 -6 -7,-8
N/A 22.5ns 20ns 15ns 20ns 22.5ns 20ns 45ns 50ns
MIT-DS-0380-0.1
MITSUBISHI ELECTRIC 4 / 55 ) (
17.Mar.2000
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH32S72... |
| Description |
From old datasheet system
2,415,919,104-BIT (33,554,432 - WORD BY 72-BIT)Synchronous DRAM
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| File Size |
699.48K /
55 Page |
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it Online |
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MITSUBISHI[Mitsubishi Electric Semiconductor]
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| Part No. |
MH32S72PHB-8 MH32S72PHB-10 MH32S72PHB-7 B99017
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| OCR Text |
...s 13ns 15ns 6ns 7ns 8ns N/A N/A 20ns 30ns 20ns 20ns 30ns 50ns 60ns
24
SDRAM Access form Clock(2nd highest CAS latency)
-7 -8 -10
tAC for CL=2 25 26 27 28 29 30 SDRAM Cycle time(3rd highest CAS latency)
SDRAM Access form Clock(3... |
| Description |
From old datasheet system
2415919104-BIT (33554432 - WORD BY 72-BIT)SynchronousDRAM
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| File Size |
591.49K /
55 Page |
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it Online |
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MITSUBISHI[Mitsubishi Electric Semiconductor]
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| Part No. |
MH64S72QJA-8 MH64S72QJA-7 B99048
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| OCR Text |
...-8
10ns 13ns 6ns 7ns N/A N/A 20ns 20ns 20ns 50ns
24
SDRAM Access form Clock(2nd highest CAS latency)
tAC for CL=2 25 26 27 28 29 30 SDRAM Cycle time(3rd highest CAS latency)
SDRAM Access form Clock(3rd highest CAS latency)
P... |
| Description |
From old datasheet system
4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
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| File Size |
967.90K /
56 Page |
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it Online |
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MITSUBISHI[Mitsubishi Electric Semiconductor]
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| Part No. |
MH8S64AQFC-8L MH8S64AQFC-7 MH8S64AQFC-7L MH8S64AQFC-8 B00001
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| OCR Text |
...y)
10ns 13ns 6ns 7ns N/A N/A 20ns 20ns 20ns 50ns
tAC for CL=2 25 26 27 28 29 30 SDRAM Cycle time(3rd highest CAS latency)
SDRAM Access form Clock(3rd highest CAS latency)
Precharge to Active Minimum Row Active to Row Active Min. R... |
| Description |
From old datasheet system
536,870,912-BIT (8,388,608 - WORD BY 64-BIT)SynchronousDRAM
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| File Size |
666.58K /
55 Page |
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it Online |
Download Datasheet |
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| Part No. |
K4E160811D-BL60 K4E170811D-BC50
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| OCR Text |
...t hpc remark -50 50ns 13ns 84ns 20ns 5v/3.3v -60 60ns 15ns 104ns 25ns 5v/3.3v ? active power dissipation speed 3.3v 5v 4k 2k 4k 2k -50 324 396 495 605 -60 288 360 440 550 unit : mw s e n s e a m p s & i / o data out buffer data in ... |
| Description |
2M X 8 EDO DRAM, 60 ns, PDSO28
2M X 8 EDO DRAM, 50 ns, PDSO28
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| File Size |
259.46K /
21 Page |
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it Online |
Download Datasheet |
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MITSUBISHI[Mitsubishi Electric Semiconductor]
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| Part No. |
MH8S64DALD-8 MH8S64DALD-6 MH8S64DALD-7 B99052
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| OCR Text |
...-6 -7,-8 -6 -7,-8
N/A 22.5ns 20ns 15ns 20ns 22.5ns 20ns 45ns 50ns
MIT-DS-0339-0.0
MITSUBISHI ELECTRIC ( 4 / 55 )
17.Sep.1999
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH8S64D... |
| Description |
From old datasheet system
536870912-BIT (8388608 - WORD BY 64-BIT)Synchronous DRAM
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| File Size |
695.91K /
55 Page |
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it Online |
Download Datasheet |
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MITSUBISHI[Mitsubishi Electric Semiconductor]
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| Part No. |
MH8S64DBKG-8L MH8S64DBKG-7 MH8S64DBKG-7L MH8S64DBKG-8 B99062
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| OCR Text |
...y)
10ns 13ns 6ns 7ns N/A N/A 20ns 20ns 20ns 50ns
tAC for CL=2 SDRAM Cycle time(3rd highest CAS latency)
SDRAM Access form Clock(3rd highest CAS latency)
Precharge to Active Minimum Row Active to Row Active Min. RAS to CAS Delay Mi... |
| Description |
From old datasheet system
536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM
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| File Size |
684.04K /
55 Page |
View
it Online |
Download Datasheet |
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