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IBM Microeletronics
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| Part No. |
STB010XX
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| OCR Text |
... rom, and flash memory. support geared to your development needs evaluation kits, including source code, a circuit board, and debug/compiler tools, are available to improve your time-to- market. ibm offers microsoft ? windows ? 95 hosted d... |
| Description |
Digital Set-Top Box（STBIntegrated Controllers(用于DVB和电视机STB应用的数字机顶盒集成控制
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| File Size |
400.74K /
2 Page |
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it Online |
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Atmel Corp.
Atmel, Corp.
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| Part No. |
ATR0635
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| OCR Text |
... management controller (apmc) ? geared master clock to reduce power consumption ? sleep state with disabled master clock ? hibernate state with 32.768 khz master clock real time clock (rtc) 1.8v to 3.3v user-definable io volt age for s... |
| Description |
ANTARIS4 Single-chip GPS Receiver SuperSense ANTARIS4单芯片GPS接收机的SuperSense
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| File Size |
282.95K /
33 Page |
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it Online |
Download Datasheet |
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Integrated Device Technology, Inc.
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| Part No. |
9FG1200DG-1LF 9FG1200DG-1LFT 9FG1200YG-1LF-T 9FG1200DF-1LF 9FG1200DF-1LFT ICS9FG1200D-1
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| OCR Text |
...ar ratios clk_in (cpu fsb) mhz geared dif outputs mhz mn gear ratio n/m (fs_a#) byte 0, bit 4 fs4 byte 0, bit 3 fs3 byte 0, bit 2 fs2 byte 0, bit 1 fs1 byte 0, bit 0 fs0 notes 100.00 133.33 3 4 1.333 0 0 0 0 0 100.00 166.67 3 5 1.66... |
| Description |
Frequency Gearing Clock for CPU, PCIe Gen1, Gen2
400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-56
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| File Size |
288.56K /
23 Page |
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it Online |
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Atmel, Corp.
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| Part No. |
ATR0622P1-PYQW
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| OCR Text |
... be d eactivated individually ? geared master clock to reduce power consumption ? sleep state with disabled master clock ? hibernate state with 32.768 khz master clock real time clock (rtc) 2.3v to 3.6v or 1.8v core supply voltage in... |
| Description |
TELECOM, CELLULAR, BASEBAND CIRCUIT, PQCC56 8 X 8 MM, 0.50 MM PITCH, GREEN, QFN-56
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| File Size |
232.08K /
27 Page |
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it Online |
Download Datasheet |
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Atmel, Corp.
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| Part No. |
ATR0621P1-7FQY
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| OCR Text |
... be d eactivated individually ? geared master clock to reduce power consumption ? sleep state with disabled master clock ? hibernate state with 32.768 khz master clock real time clock (rtc) 2.3v to 3.6v or 1.8v core supply voltage in... |
| Description |
TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA100 9 X 9 MM, 0.80 MM PITCH, ROHS COMPLIANT, LFBGA-100
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| File Size |
261.08K /
31 Page |
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it Online |
Download Datasheet |
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Price and Availability
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