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  low-flow Datasheet PDF File

For low-flow Found Datasheets File :: 27183    Search Time::1.547ms    
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    AS7C33128PFS18A-183TQI AS7C33128PFS16A-166TQI AS7C33128PFS16A-166TQC AS7C33128PFS18A-183TQC AS7C33128PFS18A-200TQC AS7C3

Alliance Semiconductor, Corp.
DB Lectro, Inc.
Glenair, Inc.
Part No. AS7C33128PFS18A-183TQI AS7C33128PFS16A-166TQI AS7C33128PFS16A-166TQC AS7C33128PFS18A-183TQC AS7C33128PFS18A-200TQC AS7C33128PFS18A-200TQI AS7C33128PFS18A-166TQI AS7C33128PFS18A-133TQI AS7C33128PFS18A-166TQC AS7C33128PFS18A-133TQC AS7C33128PFS18A-100TQC AS7C33128PFS16A-183TQC AS7C33128PFS16A-183TQI AS7C33128PFS16A-133TQI AS7C33128PFS16A-133TQC AS7C33128PFS16A-100TQC AS7C33128PFS16A-200TQC AS7C33128PFS16A-200TQI
OCR Text ...register. when adsp is sampled low, the chip enables are sampled active, and the output buffer is enabled with oe . in a read operation th...flow-through mode.when low, enables single register flow-through mode. connect to v dd if unused o...
Description x18 Synchronous SRAM
x18 SRAM
x16 Fast Synchronous SRAM x16快速同步SRAM

File Size 277.07K  /  12 Page

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    NB100LVEP222/D NB100LVEP222FAR2

ON Semiconductor
Part No. NB100LVEP222/D NB100LVEP222FAR2
OCR Text ...ck driver the nb100lvep222 is a low skew 1:15 differential 1/ 2 ecl fanout buffer designed with clock distribution in mind. the lvecl/lvp...flow greater than 500 lfpm is maintain ed. 3. input and output parameters vary 1:1 with v cc . v ee ...
Description 2.5V/3.3V 1:15 Differential ECL/PECL w1/w2 Clock Driver
2.5V/3.3V 1:15 Differential ECL/PECL w/1 and w/2 Clock Driver

File Size 100.32K  /  10 Page

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    IDT
Part No. IDT71V65702 IDT71V65702S75BG8 IDT71V65702S80BG8 IDT71V65702S85BG IDT71V65702S75PF8 IDT71V65702S80PF IDT71V65702S75BQ IDT71V65702S80BQ IDT71V65702S85PF8 IDT71V65702S80PF8 IDT71V65702S85BQ IDT71V65702S85BG8 IDT71V65902 IDT71V65902S75BG8 IDT71V65902S75BQ IDT71V65902S75PF8 IDT71V65902S80BG IDT71V65902S80BG8 IDT71V65902S80PF IDT71V65902S80BQ IDT71V65902S80PF8 IDT71V65902S85BG8 IDT71V65902S85PF8 IDT71V65902S85BQ
OCR Text ...s not asserted when adv/ ld is low, no new memory operation can be initiated. however, any pending data transfers (reads or writes) will be...flow-through outputs commercial and industrial temperature range sy...
Description 3.3V 256K x 36 ZBT Synchronous 2.5V I/O Flowthrough SRAM
3.3V 512K x 18 ZBT Synchronous 2.5V I/O Flowthrough SRAM

File Size 951.03K  /  26 Page

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    GS832118GE-166

GSI Technology
Part No. GS832118GE-166
OCR Text ...14). holding the ft mode pin low places the ram in flow through mode, causing output data to bypass the data output register. holding ft high places the ram in pipeline mode, activating the rising- edge-triggered data output regist...
Description 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs

File Size 731.52K  /  32 Page

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    Pericom Technology
Part No. PI74LPT162Q952AA PI74LPT162Q952A PI74LPT162Q952V
OCR Text ...-b enable (xceab) input must be low to enter data from xax. the data present on the a port will be clocked on the b register when xclkab tog...flow shown. b-to-a flow control is the same, except using xceba, xclkba, and xoeba. 3. level of b be...
Description Fast CMOS 3.3V 16-bit registered transceiver
Dual 8-bit Bus Transceiver

File Size 322.55K  /  5 Page

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    ams AG
Part No. AS13985
OCR Text low-noise ldo www.austriamicrosystems.co m revision 1.03 1 - 2 austria micro systems product brief 1 general description the as13985 is a h...flow might show deviations from the standard production flow, such as test flow or test location. ...
Description Micropower 150mA Low-Noise LDO

File Size 333.91K  /  2 Page

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    Alliance Semiconductor
Part No. AS7C33128PFS16A AS7C33128PFS18A AS7C33128PFS18A-133TQI AS7C33128PFS16A-133TQC AS7C33128PFS18A-133TQC
OCR Text ...register. when adsp is sampled low, the chip enables are sampled active, and the output buffer is enabled with oe . in a read operation the...flow-through mode.when low, enables single register flow-through mode. connect to v dd if unused o...
Description 3.3V 128K x 18 pipeline burst synchronous SRAM, clock speed - 133 MHz
3.3V 128K x 16/18 pipeline burst synchronous SRAM
3.3V 128K x 16 pipeline burst synchronous SRAM, clock speed - 133 MHz

File Size 210.60K  /  11 Page

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    Alliance Semiconductor, Corp.
Part No. AS7C3128PFS36A AS7C3128PFS32 AS7C3128PFS36A-4TQC AS7C3128PFS32A-4TQC AS7C3128PFS36A-3.5TQC AS7C3128PFS32A-3.5TQC AS7C3128PFS32A-3.8TQC AS7C3128PFS36A-3.8TQC AS7C3128PFS36A-5TQC AS7C3128PFS32A-5TQC AS7C3128PFS32-3.5TQC AS7C3128PFS32-3.8TQC AS7C3128PFS32-4TQC AS7C3128PFS32-5TQC AS7C3128PFS36AP-3.5TQC
OCR Text ...register when adsp is sampled low, the chip enables are sampled active, and the output buffer is enabled with oe . in a read operation th...flow-through mode.when low, enables single register flow-through mode. connect to v dd if unused o...
Description 128K x 36 synchronous SRAM, 133 MHz
128K x 36 synchronous SRAM, 150 MHz
128K x 36 synchronous SRAM, 166 MHz
128K x 32 synchronous SRAM, 100 MHz
128K x 32 synchronous SRAM, 133 MHz
128K x 32 synchronous SRAM, 150 MHz
128K x 32 synchronous SRAM, 166 MHz
128K X 32 STANDARD SRAM, 5 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 36 STANDARD SRAM, 5 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 36 STANDARD SRAM, 3.8 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 32 STANDARD SRAM, 3.8 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 32 STANDARD SRAM, 3.5 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 36 STANDARD SRAM, 3.5 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 32 STANDARD SRAM, 4 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 36 STANDARD SRAM, 4 ns, PQFP100 14 X 20 MM, TQFP-100
128K x 32/36 synchronous SRAM

File Size 156.71K  /  9 Page

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