Description |
3.3V 128K x 36 synchronous PipeLined burst SRAM w/2.or='#FF0000'>5v I/O<br>3.3V 256K x 18 synchronous PipeLined burst SRAM w/2.or='#FF0000'>5v I/O<br>128K X 36/ 256K X 18 3.3V synchronous SRAMs 2.or='#FF0000'>5v I/O/ Pipelined Outputs/ burst Counter/ single Cycle Deselect<br>128K X 36, 256K X 18 3.3V synchronous SRAMs 2.or='#FF0000'>5v I/O, Pipelined Outputs, burst Counter, single Cycle Deselect<br>128K X 36 256K X 18 3.3V synchronous SRAMs 2.or='#FF0000'>5v I/O Pipelined Outputs burst Counter single Cycle Deselect<br>
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