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				NEC[NEC]
Part No.	UPD16662 UPD16662N UPD16662N-051
OCR Text	... bus 17 Chip select Read signal Write signal High byte enable Function Ready signal to CPU (Ready state at H) Specifies the LSI alloca...through A0 to A16 into addresses compatible with the memory map of the built-in RAM. This function c...
Description	240 OUTPUT LCD COLUMN SEGMENT DRIVER WITH BUILT-IN RAM
File Size	253.03K / 36 Page	View it Online	Download Datasheet

				Maxim Integrated Products Maxim Integrated Produc...
Part No.	DS28CN010911 DS28CN01U-A00 DS28CN01U-A00T
OCR Text	...ode (Program from 1 to 0 Only) Write Access Requires Knowledge of the Secret and the Capability of Computing and Transmitting a 160-Bit MAC...through a pullup resistor. I2C/SMBus Serial Clock Input. This pin must be connected to VCC through a...
Description	1Kb I2C/SMBus EEPROM with SHA-1 Engine
File Size	123.32K / 10 Page	View it Online	Download Datasheet

				NEC[NEC]
Part No.	UPD98401A UPD98401AGD-MML
OCR Text	... Memory Parity : Control Memory Write Enable : DMA Bus Monitor Data : DMA Bus Monitor First : DMA Bus Monitor Last : DMA Bus Monitor VC : DM...through which the PD98401A transfers ATM cells with a PHY device, and a PHY control interface by whi...
Description	ATM SAR CHIP
File Size	208.11K / 36 Page	View it Online	Download Datasheet

				http:// ATMEL Corporation
Part No.	AT88SC0204C09 AT88SC0204C-WI
OCR Text	...yte (512-bit) Zones Self-timed Write Cycle Single Byte or 16-byte Page Write Mode Programmable Access Rights for Each Zone * 2-Kbit Confi...Through dynamic and symmetric mutual authentication, data encryption, and the use of encrypted check...
Description	CryptoMemory 2 Kbit
File Size	186.86K / 20 Page	View it Online	Download Datasheet

				Maxim Integrated Products
Part No.	DS2780G DS2780GTR DS278009
OCR Text	...RAMETER Time Slot Recovery Time Write-0 Low Time Write-1 Low Time Read Data Valid Reset Time High Reset Time Low Presence Detect High Presen...through this input pin. Power-Supply Input. Connect to the positive terminal of the battery cell thr...
Description	Standalone Fuel Gauge IC
File Size	432.82K / 31 Page	View it Online	Download Datasheet

				Intersil, Corp. XICOR[Xicor Inc.]
Part No.	X9241AYP X9241AYPI X9241AYS X9241AYSI X9241AYV X9241AYVI X9241AMV X9241AMVI X9241AUP X9241AUPI X9241AWP X9241AWPI X9241AWS X9241AWSI X9241AMPI X9241AMP X9241AWV X9241AWVI X9241A X9241AMS X9241AMSI X9241AUS X9241AUSI X9241AUV X9241AUVI
OCR Text	...r oriented format --Direct read/write/transfer of wiper positions --Store as many as four positions per potentiometer * Terminal Voltages: +...through switches. The position of the wiper on the array is controlled by the user through the 2-wir...
Description	Quad Digitally Controlled Potentiometer (XDCP) 四重数控电位器（数字电位器）
File Size	361.02K / 18 Page	View it Online	Download Datasheet

				INTEGRATED DEVICE TECHNOLOGY INC
Part No.	72V3683L10PFG
OCR Text	...5 fs2 fs0/sd fs1/ sen b 0 -b 35 write pointer read pointer mail 2 register mbf2 clkb csb w /rb enb mbb be bm size port-b control logic 16 46...through a port are gated to the low-to-high transition of a port clock by enable signals. the clock...
Description	16K X 36 OTHER FIFO, 6.5 ns, PQFP128
File Size	263.96K / 30 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1307AV18-167BZC CY7C1307AV18 CY7C1307AV18-100BZC CY7C1307AV18-133BZC CY7C1305AV18-167BZC CY7C1305AV18-133BZC CY7C1305AV18-100BZC
OCR Text	Write data ports -- Supports concurrent transactions * 167 MHz Clock for high bandwidth -- 2.5 ns Clock-to-Valid access time * 4-Word Burst ...through a common address bus. Addresses for Read and Write addresses are latched on alternate rising...
Description	18-Mb Burst of 4 Pipelined SRAM with QDR垄芒 Architecture 18-Mb Burst of 4 Pipelined SRAM with QDR Architecture
File Size	328.64K / 20 Page	View it Online	Download Datasheet

				GSI TECHNOLOGY
Part No.	GS880V18BGT-150T
OCR Text	...nterleaved pipeline mode ? byte write (bw ) and/or global write (gw ) operation ? internal self-timed write cycle ? automatic power-down for...through/pipeline reads the function of the data output register can be controlled by the user via t...
Description	512K X 18 CACHE SRAM, 7.5 ns, PQFP100
File Size	431.33K / 23 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1303AV18-167BZC CY7C1306AV18-167BZC CY7C1303AV18-133BZC CY7C1306AV18-133BZC CY7C1303AV18-100BZC CY7C1306AV18-100BZC
OCR Text	...* Separate independent Read and Write data ports -- Supports concurrent transactions * 167-MHz Clock for high bandwidth -- 2.5 ns Clock-to-V...through a common address bus. The Read address is latched on the rising edge of the K clock and the ...
Description	18-Mb Burst of 2 Pipelined SRAM with QDR(TM) Architecture 18-Mb Burst of 2 Pipelined SRAM with QDR Architecture 18-Mb Burst of 2 Pipelined SRAM with QDR垄芒 Architecture
File Size	330.87K / 20 Page	View it Online	Download Datasheet

For write-through Found Datasheets File :: 21361 Search Time::1.266ms
Page :: | 1 | 2 | 3 | 4 | 5 | 6 | <7> | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |