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hstl Datasheet PDF File

For hstl Found Datasheets File :: 1693 Search Time::1.578ms
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				Renesas Electronics Corporation
Part No.	PD46184184BF1-E40-EQ1 PD46185084BF1-E40-EQ1 PD46185094BF1-E40-EQ1 PD46185184BF1-E40-EQ1 PD46185364BF1-E40-EQ1 PD46184184BF1-E33Y-EQ1 PD46185364BF1-E33Y-EQ1 PD46185184BF1-E33Y-EQ1 PD46185094BF1-E33Y-EQ1 PD46185084BF1-E33Y-EQ1 PD46185184BF1-E40Y-EQ1 PD46185184BF1-E33-EQ1
OCR Text	...5-pin plastic bga (13 x 15) ? hstl interface ? pll circuitry for wide output data va lid window and future frequency scaling ? separate independent read and write da ta ports with concurrent transactions ? 100% bus utilization ddr ...
Description	18M-BIT DDR II SRAM 4-WORD BURST OPERATION 18M-BIT QDRTM II SRAM 4-WORD BURST OPERATION
File Size	590.41K / 39 Page	View it Online	Download Datasheet

				Renesas Electronics Corporation
Part No.	PD46184182BF1-E40-EQ1 PD46184362BF1-E40-EQ1 PD46184182BF1-E33Y-EQ1 PD46184362BF1-E33Y-EQ1
OCR Text	...pin plastic bga (13 x 15) ? hstl interface ? pll circuitry for wide output data valid window and future frequency scaling ? pipelined double data rate operation ? common data input/output bus ? two-tick burst for low ddr transac...
Description	18M-BIT DDR II SRAM 2-WORD BURST OPERATION
File Size	604.78K / 34 Page	View it Online	Download Datasheet

				Maxim Integrated Products
Part No.	MAX9321-BMAX9321A
OCR Text	hstl Receiver/Drivers General Description The MAX9321/MAX9321A are low-skew differential receiver/drivers designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-...
Description	Differential LVPECL/LVECL/hstl Receiver/Drivers
File Size	142.56K / 9 Page	View it Online	Download Datasheet

				GSI TECHNOLOGY
Part No.	GS81302T11E-300I GS81302T11E-300T
OCR Text	...e power supply ? 1.5 v or 1.8 v hstl interface ? pipelined read operation ? fully coherent read and write pipelines ? zq pin for programmable output drive strength ? data valid pin (qvld) support ? ieee 1149.1 jtag-compliant boundary scan ?...
Description	16M X 9 DDR SRAM, 0.45 ns, PBGA165
File Size	287.25K / 32 Page	View it Online	Download Datasheet

				LATTICE[Lattice Semiconductor]
Part No.	ISPPAC-CLK5510V ISPPAC-CLK5510V-01T48I ISPPAC-CLK5510V-01T48C ISPPAC-CLK5520V-01T100C ISPPAC-CLK5520V-01T100I ISPPAC-CLK5520V-01TN100C ISPPAC-CLK5520V-01TN100I ISPPAC-CLK55XX ISPPAC-CLK5510V-01TN48C ISPPAC-CLK5510V-01TN48I
OCR Text	...nable controls - LVTTL, LVCMOS, hstl, SSTL, LVDS, LVPECL * Programmable precision output impedance - 40 to 70 in 5 increments * Programmable slew rate * Up to 10 banks with individual VCCO and GND - 1.5V, 1.8V, 2.5V, 3.3V * Programmable loc...
Description	In-System Programmable Clock Generator with Universal Fan-Out Buffer
File Size	794.03K / 43 Page	View it Online	Download Datasheet

				Renesas Electronics Corporation
Part No.	UPD44325092BF5-E33-FQ1 PD44325092B-15
OCR Text	...5-pin plastic bga (15 x 17) ? hstl interface ? pll circuitry for wide output data va lid window and future frequency scaling ? separate independent read and write da ta ports with concurrent transactions ? 100% bus utilization ddr ...
Description	4M X 9 QDR SRAM, 0.45 ns, PBGA165 36M-BIT QDRTM II SRAM 2-WORD BURST OPERATION
File Size	385.35K / 36 Page	View it Online	Download Datasheet

				Renesas Electronics Corporation
Part No.	UPD44325084BF5-E33-FQ1 PD44325084BF5-E50-FQ1-A PD44325094BF5-E40-FQ1-A PD44325184BF5-E35-FQ1-A
OCR Text	...5-pin plastic bga (15 x 17) ? hstl interface ? pll circuitry for wide output data va lid window and future frequency scaling ? separate independent read and write da ta ports with concurrent transactions ? 100% bus utilization ddr ...
Description	4M X 8 QDR SRAM, 0.45 ns, PBGA165 36M-BIT QDRTM II SRAM 4-WORD BURST OPERATION
File Size	437.89K / 40 Page	View it Online	Download Datasheet

				Renesas Electronics Corporation
Part No.	UPD44324092BF5-E33-FQ1 UPD44324182BF5-E33-FQ1 PD44324092BF5-E50-FQ1-A PD44324182BF5-E40-FQ1-A PD44324362BF5-E33-FQ1-A PD44324182BF5-E35-FQ1-A PD44324182BF5-E50-FQ1-A PD44324092BF5-E40-FQ1-A PD44324362BF5-E35-FQ1-A PD44324092BF5-E35-FQ1
OCR Text	...pin plastic bga (15 x 17) ? hstl interface ? pll circuitry for wide output data va lid window and future frequency scaling ? pipelined double data rate operation ? common data input/output bus ? two-tick burst for low ddr transa...
Description	4M X 9 DDR SRAM, 0.45 ns, PBGA165 2M X 18 DDR SRAM, 0.45 ns, PBGA165 36M-BIT DDR II SRAM 2-WORD BURST OPERATION
File Size	478.87K / 37 Page	View it Online	Download Datasheet

				IDT
Part No.	IDT72T40108 IDT72T4088IDT72T4098 IDT72T4098
OCR Text	...DDR -SDR to SDR User selectable hstl or LVTTL I/Os Read Enable & Read Clock Echo outputs aid high speed operation 2.5V LVTTL or 1.8V, 1.5V hstl Port Selectable Input/Ouput voltage 3.3V Input tolerant Mark & Retransmit, resets read pointer t...
Description	2.5 VOLT HIGH-SPEED TeraSync? DDR/SDR FIFO 40-BIT CONFIGURATION 2.5 VOLT HIGH-SPEED TeraSync™ DDR FIFO 40-BIT CONFIGURATION
File Size	456.68K / 52 Page	View it Online	Download Datasheet

For hstl Found Datasheets File :: 1693 Search Time::1.578ms
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