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Renesas Electronics Corporation. Renesas Electronics, Corp.
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| Part No. |
M380t color='#FF0000'>30t>F2L-XXXHP M380t color='#FF0000'>30t>F2L-XXXKP M380t color='#FF0000'>30t>F2L-XXXSP M380t color='#FF0000'>30t>F2L-XXXWG M380t color='#FF0000'>30t>MAL-XXXWG M380t color='#FF0000'>30t>MAL-XXXKP M380t color='#FF0000'>30t>FAL-XXXSP M38031FAL-XXXHP M380t color='#FF0000'>30t>FAL-XXXWG M380t color='#FF0000'>30t>MAL-XXXHP M380t color='#FF0000'>30t>FAL-XXXKP M38031FAL-XXXKP M380t color='#FF0000'>30t>FAL-XXXHP M38031FAL-XXXSP M38031FAL-XXXWG M380t color='#FF0000'>30t>MAL-XXXSP M380t color='#FF0000'>30t>F3L-XXXHP M380t color='#FF0000'>30t>F3L-XXXWG M380t color='#FF0000'>30t>M3L-XXXKP M380t color='#FF0000'>30t>F3L-XXXSP M380t color='#FF0000'>30t>F3L-XXXKP M380t color='#FF0000'>30t>M3L-XXXHP M380t color='#FF0000'>30t>FBL-XXXWG M380t color='#FF0000'>30t>MBL-XXXHP M380t color='#FF0000'>30t>FBL-XXXHP M380t color='#FF0000'>30t>FBL-XXXSP M380t color='#FF0000'>30t>MBL-XXXKP M380t color='#FF0000'>30t>M2L-XXXHP M380t color='#FF0000'>30t>M2L-XXXKP M380t color='#FF0000'>30t>M2L-XXXSP M380t color='#FF0000'>30t>M2L-XXXWG M38031F2L-XXXHP M38031F2L-XXXKP M38031F2L-XXXSP M38031F2L-XXXWG M380t color='#FF0000'>30t>FB-XXXHP M38031FBL-XXXSP M38035MBL-XXXSP M38038FBL-XXXSP M38039FBL-XXXSP M380t color='#FF0000'>30t>MBL-XXXSP M38036MBL-XXXSP M38037FBL-XXXSP M38037MBL-XXXSP M38036FBL-XXXSP M38038MBL-XXXSP M38031FC-XXXHP M38031FC-XXXKP M38031FC-XXXWG M38031FCL-XXXHP M38031FCL-XXXKP M38031FCL-XXXSP M38031FCL-XXXWG M38031F5-XXXKP M38031F5-XXXSP M38031F5-XXXWG M38031F5L-XXXHP M38031F5L-XXXKP M38031F5L-XXXSP M38031F5L-XXXWG M380t color='#FF0000'>30t>F1-XXXHP M380t color='#FF0000'>30t>F1-XXXKP M380t color='#FF0000'>30t>F1-XXXSP M380t color='#FF0000'>30t>F1-XXXWG M380t color='#FF0000'>30t>F1L-XXXHP M380t color='#FF0000'>30t>F1L-XXXKP M380t color='#FF0000'>30t>F1L-XXXSP M380t color='#FF0000'>30t>F1L-XXXWG M38031F1-XXXKP M38031F1-XXXWG M38031F1L-XXXHP M38031F1L-XXXKP M38031F6-XXXHP M38031F6-XXXKP M38031F6-XXXSP M38031F6-XXXWG M
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| Description |
256 Kbit (32K x 8) nvSRAM; Organization: 32Kb x 8; Vcc (V): 2.7 to 3.6 V; Density: 256 Kb; Package: SOIC 3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 10 t color='#FF0000'>mhzt> to 133 t color='#FF0000'>mhzt>; Outputs: 5; Operating t color='#FF0000'>ranget>: 0 to 70 C 256K (32K x 8) Static RAM; Density: 256 Kb; Organization: 32Kb x 8; Vcc (V): 4.50 to 5.50 V; three-PLL General Purpose FLASH Programmable Clock Generator; Voltage (V): 3.3 V; t color='#FF0000'>inputt> t color='#FF0000'>ranget>: 1 t color='#FF0000'>mhzt> to 166 t color='#FF0000'>mhzt>; Output t color='#FF0000'>ranget>: 1 t color='#FF0000'>mhzt> to 200 t color='#FF0000'>mhzt>; Outputs: 6 5V, 3.3V, ISR(tM) High-Performance CPLDs; # Macrocells: 256; Vcc (V): 3.3; fMax (t color='#FF0000'>mhzt>): 66; tPD (ns): 12 8-Mbit (512K x 16) Static RAM; Density: 8 Mb; Organization: 512Kb x 16; Vcc (V): 2.20 to 3.60 V; 9-Mbit (256K x 36/512K x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V 9-Mbit (256K x 36/512K x 18) Flow-through SRAM; Architecture: Standard Sync, Flow-through; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V 18-Mbit QDR(tM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V Four Output PCI-X and General Purpose Buffer; Voltage (V): 3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 0 t color='#FF0000'>mhzt> to 140 t color='#FF0000'>mhzt>; Outputs: 4; Operating t color='#FF0000'>ranget>: 0 to 70 C 18-Mbit QDR(tM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V 9-Mbit (256K x 36/512K x 18) Flow-through SRAM with NoBL(tM) Architecture; Architecture: NoBL, Flow-through; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL(tM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 2.4 to 2.6 V 4-Mbit (512K x 8) Static RAM; Density: 4 Mb; Organization: 512Kb x 8; Vcc (V): 4.50 to 5.50 V; 4-Mbit (256K x 16) Static RAM; Density: 4 Mb; Organization: 256Kb x 16; Vcc (V): 2.20 to 3.60 V; 64K x 16 Static RAM; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 3.0 to 3.6 V; 1-Mbit (64K x 16) Static RAM; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 4.5 to 5.5 V; 9-Mbit (256K x 36/512K x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V 1-Mbit (64K x 16) Static RAM; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 3.0 to 3.6 V; 4 Mbit (512K x 8/256K x 16) nvSRAM; Organization: 512Kb x 8; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: tSOP 4 Mbit (512K x 8/256K x 16) nvSRAM; Organization: 256Kb x 16; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: tSOP 16-Mbit (1M x 16 / 2M x 8) Static RAM; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 4.50 to 5.50 V; 4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INt, BUSY; Density: 128 Kb; Organization: 8Kb x 16; Vcc (V): 4.5 to 5.5 V; Speed: 35 ns 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL(tM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V 9-Mbit (256K x 36/512K x 18) Flow-through SRAM with NoBL(tM) Architecture; Architecture: NoBL, Flow-through; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL(tM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 2.4 to 2.6 V 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL(tM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V 8-Mbit (512K x 16) Static RAM; Density: 8 Mb; Organization: 512Kb x 16; Vcc (V): 4.50 to 5.50 V; 9-Mbit (256K x 36/512K x 18) Flow-through SRAM; Architecture: Standard Sync, Flow-through; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V 256K x 16 Static RAM; Density: 4 Mb; Organization: 256Kb x 16; Vcc (V): 4.5 to 5.5 V; 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM; Architecture: Standard Sync, Pipeline DCD; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V 4-Mbit (256K x 16) Static RAM; Density: 4 Mb; Organization: 256Kb x 16; Vcc (V): 3.0 to 3.6 V; 8-Mbit (1024K x 8) Static RAM; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 2.20 to 3.60 V; 18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL(tM) Architecture; Architecture: NoBL, Pipeline; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V 256K x 16 Static RAM; Density: 4 Mb; Organization: 256Kb x 16; Vcc (V): 3.0 to 3.6 V; 8-Mbit (1M x 8) Static RAM; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 2.20 to 3.60 V; 3.3V Zero Delay Buffer; Voltage (V): 3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 10 t color='#FF0000'>mhzt> to 133 t color='#FF0000'>mhzt>; Outputs: 8; Operating t color='#FF0000'>ranget>: -40 to 85 C Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating t color='#FF0000'>frequencyt>: 3.75 t color='#FF0000'>mhzt> to 80 t color='#FF0000'>mhzt>; Outputs: 8; Operating t color='#FF0000'>ranget>: -40 to 85 C 18-Mbit (512K x 36/1M x 18) Flow-through SRAM with NoBL(tM) Architecture; Architecture: NoBL, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V 18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL(tM) Architecture; Architecture: NoBL, Pipeline; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 512K x 8 Static RAM; Density: 4 Mb; Organization: 512Kb x 8; Vcc (V): 4.5 to 5.5 V; 18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL(tM) Architecture; Architecture: NoBL, Pipeline; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 2.4 to 2.6 V 2.5V or 3.3V, 200-t color='#FF0000'>mhzt>, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 0 t color='#FF0000'>mhzt> to 200 t color='#FF0000'>mhzt>; Outputs: 12; Operating t color='#FF0000'>ranget>: -40 to 85 C 3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 10 t color='#FF0000'>mhzt> to 133 t color='#FF0000'>mhzt>; Outputs: 5; Operating t color='#FF0000'>ranget>: -40 to 85 C 2M x 8 Static RAM; Density: 16 Mb; Organization: 2Mb x 8; Vcc (V): 3.0 to 3.6 V; 16 Mbit (512K X 32) Static RAM; Density: 16 Mb; Organization: 512Kb x 32; Vcc (V): 3.0 to 3.6 V; 3.3V Zero Delay Buffer; Voltage (V): 3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 10 t color='#FF0000'>mhzt> to 133 t color='#FF0000'>mhzt>; Outputs: 8; Operating t color='#FF0000'>ranget>: 0 to 70 C 8-Mbit (1M x 8) Static RAM; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 3.0 to 3.6 V; 5V, 3.3V, ISR(tM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (t color='#FF0000'>mhzt>): 125; tPD (ns): 6 2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 3.0 to 3.6 V; 16-Mbit (1M x 16) Static RAM; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 3.0 to 3.6 V; 4-Mbit (256K x 18) Pipelined DCD Sync SRAM; Architecture: Standard Sync, Pipeline DCD; Density: 4 Mb; Organization: 256Kb x 18; Vcc (V): 3.1 to 3.6 V 512K (32K x 16) Static RAM; Density: 512 Kb; Organization: 32Kb x 16; Vcc (V): 3.0 to 3.6 V; 4-Mbit (128K x 36) Pipelined SRAM with NoBL(tM) Architecture; Architecture: NoBL, Pipeline; Density: 4 Mb; Organization: 128Kb x 36; Vcc (V): 3.1 to 3.6 V 1M x 16 Static RAM; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 3.0 to 3.6 V; Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating t color='#FF0000'>frequencyt>: 3.75 t color='#FF0000'>mhzt> to 80 t color='#FF0000'>mhzt>; Outputs: 8; Operating t color='#FF0000'>ranget>: 0 to 70 C 3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 10 t color='#FF0000'>mhzt> to 133 t color='#FF0000'>mhzt>; Outputs: 9; Operating t color='#FF0000'>ranget>: 0 to 70 C MoBL(R) 2 Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V; Rambus(R) XDR(tM) Clock Generator; VDD: 2.5 V; t color='#FF0000'>inputt> t color='#FF0000'>frequencyt>: 100 t color='#FF0000'>mhzt> to 133 t color='#FF0000'>mhzt>; Output t color='#FF0000'>frequencyt>: t color='#FF0000'>30t>0 t color='#FF0000'>mhzt> to 800 t color='#FF0000'>mhzt>; # Out: 4 2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V; 4-Mbit (128K x 36) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 4 Mb; Organization: 128Kb x 36; Vcc (V): 3.1 to 3.6 V 5V, 3.3V, ISR(tM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (t color='#FF0000'>mhzt>): 167; tPD (ns): 7 2.5V or 3.3V, 200-t color='#FF0000'>mhzt>, 1:10 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 0 t color='#FF0000'>mhzt> to 200 t color='#FF0000'>mhzt>; Outputs: 10; Operating t color='#FF0000'>ranget>: 0 to 70 C 5V, 3.3V, ISR(tM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (t color='#FF0000'>mhzt>): 100; tPD (ns): 7 5V, 3.3V, ISR(tM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (t color='#FF0000'>mhzt>): 125; tPD (ns): 7 18-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating t color='#FF0000'>frequencyt>: 3.75 t color='#FF0000'>mhzt> to 80 t color='#FF0000'>mhzt>; Outputs: 8; Operating t color='#FF0000'>ranget>: 0 to 70 C Spread Spectrum Clock Generator; Voltage(V): 3.3 V; t color='#FF0000'>inputt> t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 25 t color='#FF0000'>mhzt> to 100 t color='#FF0000'>mhzt>; Output t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 25 t color='#FF0000'>mhzt> to 100 t color='#FF0000'>mhzt>; Operating t color='#FF0000'>ranget>: 0 to 70 C; Package: SOIC Low Skew Clock Buffer; Voltage (V): 5.0 V; Operating t color='#FF0000'>frequencyt>: 3.75 t color='#FF0000'>mhzt> to 80 t color='#FF0000'>mhzt>; Outputs: 8; Operating t color='#FF0000'>ranget>: 0 to 70 C 5V, 3.3V, ISR(tM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (t color='#FF0000'>mhzt>): 143; tPD (ns): 9 单芯位CMOS微机 5V, 3.3V, ISR(tM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (t color='#FF0000'>mhzt>): 154; tPD (ns): 6 单芯位CMOS微机 SINGLE-CHIP 8-BIt CMOS MICROCOMPUtER 单芯位CMOS微机 5V, 3.3V, ISR(tM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (t color='#FF0000'>mhzt>): 100; tPD (ns): 9 单芯位CMOS微机 5V, 3.3V, ISR(tM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 3.3; fMax (t color='#FF0000'>mhzt>): 83; tPD (ns): 10 单芯位CMOS微机 5V, 3.3V, ISR(tM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (t color='#FF0000'>mhzt>): 125; tPD (ns): 6 单芯位CMOS微机 three-PLL General-Purpose EPROM Programmable Clock Generator; Voltage (V): 3.3/5.0 V; t color='#FF0000'>inputt> t color='#FF0000'>ranget>: 1 t color='#FF0000'>mhzt> to t color='#FF0000'>30t> t color='#FF0000'>mhzt>; Output t color='#FF0000'>ranget>: .077 t color='#FF0000'>mhzt> to 100 t color='#FF0000'>mhzt>; Outputs: 6 单芯位CMOS微机 8-Mbit (512K x 16) MoBL(R) Static RAM; Density: 8 Mb; Organization: 512Kb x 16; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机 High Speed Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating t color='#FF0000'>frequencyt>: 3.75 t color='#FF0000'>mhzt> to 110 t color='#FF0000'>mhzt>; Outputs: 8; Operating t color='#FF0000'>ranget>: 0 to 70 C 单芯位CMOS微机 3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs; Voltage (V): 3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 0 t color='#FF0000'>mhzt> to 100 t color='#FF0000'>mhzt>; Outputs: 10; Operating t color='#FF0000'>ranget>: 0 to 70 C 单芯位CMOS微机 3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 10 t color='#FF0000'>mhzt> to 133 t color='#FF0000'>mhzt>; Outputs: 9; Operating t color='#FF0000'>ranget>: -40 to 85 C 单芯位CMOS微机 Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating t color='#FF0000'>frequencyt>: 3.75 t color='#FF0000'>mhzt> to 80 t color='#FF0000'>mhzt>; Outputs: 8; Operating t color='#FF0000'>ranget>: -40 to 85 C 单芯位CMOS微机 2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 3.0 to 3.6 V; 单芯位CMOS微机 MoBL(R) 1 Mbit (128K x 8) Static RAM; Density: 1 Mb; Organization: 128Kb x 8; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机 18-Mbit QDR(tM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 1-Mbit (128K x 8) Static RAM; Density: 1 Mb; Organization: 128Kb x 8; Vcc (V): 4.50 to 5.50 V; 单芯位CMOS微机 4-Mbit (256K x 18) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 4 Mb; Organization: 256Kb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 2-Mbit (64K x 32) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 2 Mb; Organization: 64Kb x 32; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 200-t color='#FF0000'>mhzt> Field Programmable Zero Delay Buffer; Voltage (V): 2.5/3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 10 t color='#FF0000'>mhzt> to 200 t color='#FF0000'>mhzt>; Outputs: 12; Operating t color='#FF0000'>ranget>: -40 to 85 C 单芯位CMOS微机 2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机 SINGLE-CHIP 8-BIt CMOS MICROCOMPUtER 单芯8位CMOS微机 2-Mbit (256K x 8) Static RAM; Density: 2 Mb; Organization: 256Kb x 8; Vcc (V): 2.20 to 3.60 V; 单芯8位CMOS微机 Very Low Jitter Field and Factory Programmable Clock Generator; Voltage (V): 3.3 V; t color='#FF0000'>inputt> t color='#FF0000'>ranget>: 10 t color='#FF0000'>mhzt> to 133 t color='#FF0000'>mhzt>; Output t color='#FF0000'>ranget>: 20 t color='#FF0000'>mhzt> to 200 t color='#FF0000'>mhzt>; Outputs: 2 单芯位CMOS微机 3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 10 t color='#FF0000'>mhzt> to 133 t color='#FF0000'>mhzt>; Outputs: 5; Operating t color='#FF0000'>ranget>: 0 to 70 C 单芯位CMOS微机 3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 10 t color='#FF0000'>mhzt> to 133 t color='#FF0000'>mhzt>; Outputs: 5; Operating t color='#FF0000'>ranget>: -40 to 85 C 单芯位CMOS微机 three-PLL General Purpose FLASH Programmable Clock Generator; Voltage (V): 3.3 V; t color='#FF0000'>inputt> t color='#FF0000'>ranget>: 1 t color='#FF0000'>mhzt> to 166 t color='#FF0000'>mhzt>; Output t color='#FF0000'>ranget>: 0 t color='#FF0000'>mhzt> to 200 t color='#FF0000'>mhzt>; Outputs: 3 单芯位CMOS微机 1:8 Clock Fanout Buffer; Voltage (V): 3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 0 t color='#FF0000'>mhzt> to 350 t color='#FF0000'>mhzt>; Outputs: 8; Operating t color='#FF0000'>ranget>: -40 to 85 C 单芯位CMOS微机 Quad PLL Clock Generator with 2-Wire Serial Interface; Voltage (V): 2.5/3.3 V; t color='#FF0000'>inputt> t color='#FF0000'>ranget>: 27 t color='#FF0000'>mhzt> to 27 t color='#FF0000'>mhzt>; Output t color='#FF0000'>ranget>: 4.2 t color='#FF0000'>mhzt> to 166 t color='#FF0000'>mhzt>; Outputs: 5 单芯位CMOS微机 2.5V or 3.3V, 200-t color='#FF0000'>mhzt>, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 0 t color='#FF0000'>mhzt> to 200 t color='#FF0000'>mhzt>; Outputs: 12; Operating t color='#FF0000'>ranget>: 0 to 70 C 单芯位CMOS微机 3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 10 t color='#FF0000'>mhzt> to 133 t color='#FF0000'>mhzt>; Outputs: 9; Operating t color='#FF0000'>ranget>: 0 to 70 C 单芯位CMOS微机 High Speed Multi-phase PLL Clock Buffer; Voltage (V): 3.3 V; Operating t color='#FF0000'>frequencyt>: 24 t color='#FF0000'>mhzt> to 200 t color='#FF0000'>mhzt>; Outputs: 11; Operating t color='#FF0000'>ranget>: 0 to 70 C 单芯位CMOS微机 2.5V or 3.3V, 200-t color='#FF0000'>mhzt>, 1:18 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 0 t color='#FF0000'>mhzt> to 200 t color='#FF0000'>mhzt>; Outputs: 18; Operating t color='#FF0000'>ranget>: -40 to 85 C 单芯位CMOS微机 -bit AVR Microcontroller with 8K Bytes In- System Programmable Flash 位AVR微控制器具有8K字节的系统内可编程闪 2.5V or 3.3V, 200-t color='#FF0000'>mhzt>, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 0 t color='#FF0000'>mhzt> to 200 t color='#FF0000'>mhzt>; Outputs: 12; Operating t color='#FF0000'>ranget>: 0 to 70 C 1:8 Clock Fanout Buffer; Voltage (V): 3.3 V; t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 0 t color='#FF0000'>mhzt> to 350 t color='#FF0000'>mhzt>; Outputs: 8; Operating t color='#FF0000'>ranget>: 0 to 70 C Spread Spectrum Clock Generator; Voltage(V): 3.3 V; t color='#FF0000'>inputt> t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 4 t color='#FF0000'>mhzt> to 32 t color='#FF0000'>mhzt>; Output t color='#FF0000'>frequencyt> t color='#FF0000'>ranget>: 4 t color='#FF0000'>mhzt> to 32 t color='#FF0000'>mhzt>; Operating t color='#FF0000'>ranget>: 0 to 70 C; Package: SOIC High Speed Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating t color='#FF0000'>frequencyt>: 3.75 t color='#FF0000'>mhzt> to 110 t color='#FF0000'>mhzt>; Outputs: 8; Operating t color='#FF0000'>ranget>: 0 to 70 C 5V, 3.3V, ISR(tM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (t color='#FF0000'>mhzt>): 100; tPD (ns): 9
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| File Size |
1,602.57K /
119 Page |
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| Part No. |
AM26LS31DCB AM26LS31SCtR AM26LS31/B2C AM26LS31LC AM26LS31JCtR AM26LS31/LMC AM26LS31/BEA
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| Description |
Line Driver Micropower Precision Shunt Voltage Reference; Package: SO; No of Pins: 8; temperature t color='#FF0000'>ranget>: -40°C to 85°C 1.4t color='#FF0000'>mhzt>, Single Cell DC/DC Converter in 5-Lead SOt-23; Package: SOt; No of Pins: 5; temperature t color='#FF0000'>ranget>: 0°C to 70°C 45t color='#FF0000'>mhzt>, 45V/us, Dual/Quad Rail-to-Rail t color='#FF0000'>inputt> and Output Precision Op Amps; Package: SO; No of Pins: 8; temperature t color='#FF0000'>ranget>: 0°C to 70°C t color='#FF0000'>30t>t color='#FF0000'>mhzt>, 10V/us, Dual/Quad Rail-to-Rail t color='#FF0000'>inputt> and Output Precision Op Amps; Package: PDIP; No of Pins: 8; temperature t color='#FF0000'>ranget>: 0°C to 70°C Micropower Step-Up DC/DC Converters in thinSOt; Package: SOt; No of Pins: 5; temperature t color='#FF0000'>ranget>: -40°C to 125°C Inverting 600kHz Switching Regulator; Package: SO; No of Pins: 8; temperature t color='#FF0000'>ranget>: -40°C to 85°C
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| File Size |
229.02K /
11 Page |
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MAXIM INtEGRAtED PRODUCtS INC MAXIM - Dallas Semiconductor MAXIM[Maxim Integrated Products] Maxim Integrated Products, Inc.
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| Part No. |
MAX1856 MAX1856EUB
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| Description |
Wide t color='#FF0000'>inputt> t color='#FF0000'>ranget> / Synchronizable / PWM SLIC Power Supply " Wide-t color='#FF0000'>inputt>-t color='#FF0000'>ranget>, Synchronizable, PWM SLIC Power Supply" Wide t color='#FF0000'>inputt> t color='#FF0000'>ranget> Synchronizable PWM SLIC Power Supply From old datasheet system Wide t color='#FF0000'>inputt> t color='#FF0000'>ranget>, Synchronizable, PWM SLIC Power Supply Replaced by tMS320C6202B : Fixed-Point Digital Signal Processor 352-FCBGA 0 to 0 SWItCHING CONtROLLER, 575 kHz SWItCHING FREQ-MAX, PDSO10 Replaced by tMS320C6202B : Fixed-Point Digital Signal Processor 352-FCBGA 宽输入范围、可同步的、PWM SLIC电源
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| File Size |
590.83K /
18 Page |
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