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| Part No. |
A3PN125-ZVQG100I
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| OCR Text |
...er), flash-based cmos process ? live at power-up (lapu) level 0 support ? single-chip solution ? retains programmed design when powered off high performance ? 350 mhz system performance in-system programming (isp) and security ? secure isp ... |
| Description |
FPGA, 3072 CLBS, 125000 GATES, PQFP100
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| File Size |
3,243.91K /
100 Page |
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it Online |
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| Part No. |
SCES293
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| OCR Text |
...p 3-State, and BIAS VCC Support live Insertion Bus Hold on A-Port Data Inputs Distributed VCC and GND-Pin Configuration Minimizes High-Speed Switching Noise Packaged in Plastic Fine-Pitch Ball Grid Array Package
NOTE: For tape and reel o... |
| Description |
From old datasheet system
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| File Size |
144.31K /
10 Page |
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it Online |
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linear
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| Part No. |
LTC4303 4303F
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| OCR Text |
...llows I/O card insertion into a live backplane without corruption of the data and clock busses. When a connection is made, the LTC4303 provides bidirectional buffering, keeping the backplane and card capacitances isolated. If SDAOUT or SCLO... |
| Description |
Hot Swappable 2-Wire Bus Buffer with Stuck Bus Recovery From old datasheet system
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| File Size |
375.71K /
12 Page |
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it Online |
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| Part No. |
SCES294
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| OCR Text |
...p 3-State, and BIAS VCC Support live Insertion Bus Hold on A-Port Data Inputs Distributed VCC and GND-Pin Configuration Minimizes High-Speed Switching Noise Package Option Includes Plastic Thin Shrink Small-Outline Package
DGG PACKAGE (T... |
| Description |
From old datasheet system
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| File Size |
176.81K /
13 Page |
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it Online |
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Price and Availability
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