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  gen1-2-3 Datasheet PDF File

For gen1-2-3 Found Datasheets File :: 119    Search Time::2.187ms    
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    AT78C5081

ATMEL Corporation
Part No. AT78C5081
OCR Text Gen1 Physical Layer 150 MHz Frequency Synthesizer for ASIC Clock Generation Built-in Transmission PLL Circuits Parallel 10b interface Option...2 AT78C5081 3527AS-NETST-10/04 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, US...
Description Serial ATA Physical Layer

File Size 110.94K  /  3 Page

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    9ZX21501BKLFT

Integrated Device Technology
Integrated Device Techn...
Part No. 9ZX21501BKLFT
OCR Text ...is backwards compatible to pcie gen1 and gen2. an adjustable external feedback path allows the user to eliminate trace delays from their des...2:0) output features ? 15 - 0.7v current mode differential hscl output pairs idt ? 15-output dif...
Description 15-Output Differential Zbuffer for PCIe Gen2/3 and QPI

File Size 180.35K  /  16 Page

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    9ZX21901CKLFT ICS9ZX21901CKLFT

Integrated Device Technology
Integrated Device Techn...
Part No. 9ZX21901CKLFT ICS9ZX21901CKLFT
OCR Text ...is backwards compatible to pcie gen1 and gen2. a fixed external feedback maintains low drift for critical qpi applications. in bypass mode,...2 pin configuration 72-pin mlf functionality at power up (pll mode) 100m_133m# dif_in ( mhz ) dif ( ...
Description 19-Output Differential Zbuffer for PCIe Gen2/3 and QPI

File Size 181.03K  /  16 Page

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    AT78C5009

ATMEL Corporation
Part No. AT78C5009
OCR Text ...fully compliant with Serial ATA Gen1. The PHY block is connected to the ATA block by a 20-bit transmit and a 20-bit receive data bus. This h...2:0] ATA_IOWRN ATA_IORDN ATA_HCS0 ATA_HCS1 ATA_IOCHRDY PHY_COMDET PHY_DATA[15:0] PHY_DATA[18:16] PHY...
Description Serial ATA Host Bridge

File Size 87.08K  /  3 Page

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    BU8768FV

ETC
Part No. BU8768FV
OCR Text ...10 9 TEST CIRCUIT WAVE GEN1(h) WAVEFORM GENERATOR WAVE GEN2(m) WAVE GEN3(I) ATT 1 + ATT 1 ATT 3 VOLUME DAC SMOOTHING FILTER C...2 CKSEL 3 SCLK 4 SDATA 5 SSTB 6 RSTB 7 TEST4 8 AOUT ...
Description Tone generator LSI for cellular phones

File Size 57.66K  /  2 Page

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    INTEGRATED DEVICE TECHNOLOGY INC
Part No. 9DB233AGILFT 9DB233AGLFT
OCR Text ...rds compatible to pcie gen2 and gen1. the 9db233 is driven by a differential src output pair from an idt 932s421 or 932sq420 or equivalent m...2 clock request (oe#) pins make the 9db233 suitable for express card applications. key specification...
Description 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20

File Size 165.83K  /  14 Page

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    Silicon Tech
Part No. STE12PS
OCR Text ...n FSRPn RMONF RMONS RREF CLK_GEN1 CLK_GEN2 MCLK CLK_GEN3 ACin ACout O O O I I I O I I O 5/44 www.DataSheet4U.com Pin description STE12PS Table 2. Digital pins description I/O Function Pin name Reset RESETN Statu...
Description 12-Channel Integrated PSE Line Manager

File Size 474.46K  /  44 Page

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    AT78C5091

ATMEL Corporation
Part No. AT78C5091
OCR Text Gen1 Revision 1.0a Specification * Low Power Operation - 75 mW per Channel Nominal * Key Blocks Include - Integrated OOB Processor -...2:0] pOR, phyReset rxRefMode frcPhyRdy cfgHostMode gotCIOrR gotComWake phyRdy scanClk,scanEn scanRes...
Description 1-channel Serial ATA PHY

File Size 107.41K  /  3 Page

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