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pecl hstl Datasheet PDF File

For pecl hstl Found Datasheets File :: 197 Search Time::1.125ms
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				MAXIM - Dallas Semiconductor MAXIM[Maxim Integrated Products]
Part No.	MAX9316A MAX9316AEWP
OCR Text	pecl/(LV)ECL/ hstl Clock and Data Driver General Description Features o Guaranteed 400mV Differential Output at 1.5GHz o Selectable Single-Ended or Differential Input o 130ps (max) Part-to-Part Skew at +25C o 20ps Output-to-Output Skew o ...
Description	1:5 Differential LVpecl/LVECL/ hstl Clock and Data Driver 1:5 Differential (LV)pecl/(LV)ECL/hstl Clock and Data Driver
File Size	180.33K / 11 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY89801A SY89801AMC SY89801AMCA
OCR Text	...Y89801A accepts a Positive-ECL (pecl) reference clock input at 100MHz-132MHz, and provides precisely aligned, ultra-low-jitter ratios of fre...hstl-compatible. Additionally, there is a pecl-compatible runway clock output (RCLKLV). The SY89801A...
Description	HP PA-8000 CLOCK SOURCE
File Size	80.94K / 5 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY89830U SY89830UK4I SY89830UK4ITR
OCR Text	pecl/ECL CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX Precision EdgeTM SY89830U Precision EdgeTM SY89830U FEATURES s Guaranteed AC...hstl logic levels s Available in a 16-pin TSSOP package Precision EdgeTM DESCRIPTION The SY89830...
Description	2.5V/3.3/5V 2.5GHz 1:4 pecl/ECL CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX
File Size	123.67K / 10 Page	View it Online	Download Datasheet

				INTEGRATED DEVICE TECHNOLOGY INC
Part No.	MC100ES6111ACR2
OCR Text	...age 2.5/3.3 v differential ecl/pecl/hstl fanout buffer the mc100es6111 is a bipolar monolithic differential clock fanout buffer. designed for most demanding clock distribution systems, the mc100es6111 supports various applications tha...
Description	100E SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
File Size	300.50K / 12 Page	View it Online	Download Datasheet

				Cypress Semiconductor, Corp.
Part No.	CY2XP304BVIT
OCR Text	pecl clock generation module cy2xp304 cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 docum...hstl inputs?hstl-to-l vpecl level translation ? 125- to 500-mhz output range for high-speed applica...
Description	High-Frequency Programmable pecl Clock Generation Module 1500 MHz, OTHER CLOCK GENERATOR, PBGA36
File Size	209.38K / 11 Page	View it Online	Download Datasheet

				Freescale (Motorola)
Part No.	MC100ES6014
OCR Text	....5v / 3.3v 1:5 differential ecl/pecl/hstl/lvds clock driver the mc100es6014 is a low skew 1-to-5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. the ecl/pecl input sign...
Description	2.5/3.3V 1:5 Differential ECL/pecl/hstl/LVDS Fanout Buffer
File Size	280.77K / 8 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	MC100LVEP210-D
OCR Text	... 3.3v1:5 dual differential ecl/pecl/hstl clock driver the mc100lvep210 is a low skew 1to5 dual differential driver, designed with clock distribution in mind. the ecl/pecl input signals can be either differential or singleended if the v bb ...
Description	2.5V / 3.3V 1:5 Dual Differential ECL/pecl/hstl Clock Driver
File Size	77.01K / 8 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100LVEP210 MC100LVEP210FA MC100LVEP210FAR2 ON0546
OCR Text	...on is limited to a VCC 3.0V in pecl mode, or VEE -3.0V in ECL mode. Designers can take advantage of the LVEP210's performance to distribut...hstl mode: 2.375V to 3.8V VCC with VEE = 0V LVECL mode: 0V VCC with VEE = -2.375V to -3.8V Internal ...
Description	Low-Voltage 1:5 Dual Diff.LVECL/LVpecl/LVEpecl/hstl Clock Driver 100LVE SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 From old datasheet system
File Size	135.25K / 8 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	NB100LVEP221FAG
OCR Text	...3.3v?1:20 differential hstl/ecl/pecl clock driver description the nb100lvep221 is a low skew 1-to-20 differential clock driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. the two cloc...
Description	2.5V/3.3V 1:20 Differential hstl/ECL/pecl Clock Driver 100LVE SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52
File Size	170.41K / 12 Page	View it Online	Download Datasheet

				Cypress Semiconductor, Corp.
Part No.	CY2DP3110AI
OCR Text	...ust 18, 2005 features ? ten ecl/pecl differential outputs ? one ecl/pecl differential or single-ended inputs (clka) ? one hstl differential or single-ended inputs (clkb) ? hot-swappable/-insertable ? 29 ps typical outp ut-to-output skew ?...
Description	1 of 2:10 Differential Clock/Data Fanout Buffer 2DP SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
File Size	305.22K / 10 Page	View it Online	Download Datasheet

For pecl hstl Found Datasheets File :: 197 Search Time::1.125ms
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