| PART |
Description |
Maker |
| DM74ALS109A DM74ALS109AN DM74ALS109AM DM74ALS109AM |
From old datasheet system
ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Dual J-K Positive-Edge-Triggered Flip-Flop with Preset and Clear(???杈圭?瑙????-K瑙?????甯??缃??娓??绔?伎
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
|
| 5962F9863201VCC 5962F9863201V9A 5962F9863201VXC AC |
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Dual J-K Flip-Flop with Set and Reset 辐射硬化的设置和复位JK触发
|
Intersil Corporation
Intersil, Corp.
|
| M27W201-80K6TR M27W201-200NZ6TR M27W201-80NZ6TR M2 |
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
Test Spring Probe; Current Rating:3A; Leaded Process Compatible:Yes; Length:0.060"; Peak Reflow Compatible (260 C):No; Tip/Nozzle Style:90 Concave RoHS Compliant: Yes 2兆位56Kb × 8低压紫外线可擦写可编程只读存储器和OTP存储
Triple 3-Input Positive-AND Gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70
Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70
Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
2 Mbit 256Kb x 8 Low Voltage UV EPROM and OTP EPROM
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
|
STMicroelectronics N.V.
意法半导
STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
|
| MC74AC109 |
Dual JK Positive Edge Triggered Flip-Flop
|
ON Semiconductor
|
| MTC16 74AC109 74AC109_07 74AC109MTC 74AC109SC 74AC |
Dual JK Positive Edge-Triggered Flip-Flop
|
FAIRCHILD[Fairchild Semiconductor]
|
| SN74LS74A-D |
Dual D-Type Positive Edge-Triggered Flip-Flop
|
ON Semiconductor
|
| MC74ACT109 MC74ACT109D MC74ACT109N MC74AC109 MC74A |
From old datasheet system
DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP
|
Motorola, Inc.
ON Semiconductor
|
| 74LVQ74-01 |
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop
|
Fairchild Semiconductor
|
| 74F50728 N74F50728N I74F50728D I74F50728N N74F5072 |
Synchronizing cascaded dual positive edge-triggered D-type flip-flop
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| 74LVQ74 74LVQ74SJ 74LVQ74SC |
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop
|
FAIRCHILD[Fairchild Semiconductor]
|
| MC14518BCPG MC14518BDWG MC14518BFELG |
Dual Up Counters 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, PDIP16
Dual Up Counters 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, PDSO16
|
ON Semiconductor
|
