| PART |
Description |
Maker |
| GS2961A |
Ancillary data extraction
|
Gennum Corporation
|
| W9725G6KB25A W9725G6KB-25 W9725G6KB-18 W9725G6KB-3 |
DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask
|
Winbond
|
| CY2PP3220AI CY2PP3220AIT CY2PP3220 |
Dual 1:10 Differential Clock/Data Fanout Buffer
Dual 1:10 Differential Clock / Data Fanout Buffer 2PP SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52
|
CYPRESS[Cypress Semiconductor]
Cypress Semiconductor, Corp.
|
| W9725G6JB25I |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| SH713609 SH7137 |
SCI Clock Synchronous Simultaneous Transmit and Receive of Serial Data and DTC Data Transfer
|
Renesas Electronics Corporation
|
| W9412G6JH W9412G6JH-5 |
2M ?4 BANKS ?16 BITS DDR SDRAM
Double Data Rate architecture; two data transfers per clock cycle
|
Winbond
|
| SY87701V SY87701VHC SY87701VZC |
5V/3.3V 32-1250Mbps AnyRateCLOCK AND DATA RECOVERY
5V/3.3V 32-1250Mbps AnyRate CLOCK AND DATA RECOVERY
5V/3.3V 32-1250Mbps AnyRate⑩ CLOCK AND DATA RECOVERY
|
Micrel Semiconductor,Inc.
MICREL[Micrel Semiconductor]
|
| SY87721LHITR SY87721LHY SY87721LHYTR SY87721L08 |
CLOCK AND DATA RECOVERY WITH INTEGRATED CLOCK MULTIPLIER UNIT
|
Micrel Semiconductor
|
| NBSG53AMNG NBSG53AMNR2G NBSG53A_06 NBSG53ABA NBSG5 |
2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip−Flop/Clock Divider with Reset and OLS
|
ONSEMI[ON Semiconductor]
|
| PL130-09QC-R |
Clock and Timing - Clock and Data Distribution
|
Microchip
|
| PL135-67QC |
Clock and Timing - Clock and Data Distribution
|
Microchip
|
| SY100EL15LZG-TR |
Clock and Timing - Clock and Data Distribution
|
Microchip
|
