| PART |
Description |
Maker |
| GTL2107 GTL2107PW |
12-bit GTL to LVTTL translator with power good control and high-impedance LVTTL and GTL outputs
|
NXP Semiconductors
|
| GTL16612 GTL16612DGG |
18-bit GTL/GTL to LVTTL/TTL bidirectional latched translator 3-State
|
NXP
Philips Semiconductors
|
| 74GTL1655A 74GTL1655ATTR |
16 BIT LVTTL TO GTL/GTL + UNIVERSAL BUS TRANSCEIVERS WITH LIVE INSERTION
|
ST Microelectronics
|
| GTL16612DL GTL16612 GTL16612DGG GTL16612_4 |
GTL16612; 18-bit GTL/GTL to LVTTL/TTL bidirectional universal translator (3-State)
From old datasheet system
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors
|
| SN74GTL16923DGG |
<font color=red>[Old version datasheet]</font> 18-BIT LVTTL-TO-GTL/GTL BUS TRANSCEIVERS
|
TI store
|
| GTL2018 |
8-bit LVTTL to GTL transceiver
|
NXP Semiconductors
|
| GTL2022 GTL2021 GTL2023 GTL2020 |
32-bit GTL terminator with octal enables(带八使能2GTL 终端
|
Philips Semiconductors
|
| PACGTL PAC560GT PAC121GT |
HIGH PERFORMANCE GTL TERMINATION NETWORK FOR SOCKET 370 PROCESSORS
|
CALMIRCO[California Micro Devices Corp]
|
| HIP6019B HIP6019BCB |
Dual PWM Dual Linear, Micro Core/I-O/Clock/GTL, TTL 5-Bit VID DAC, Reg Core %/I-O %/Linear .5%
Advanced Dual PWM and Dual Linear Power Control
|
Intersil Corporation
|
| 74ACT841SC 74ACT841 74ACT841SPC 74ACT841MTC 74ACT8 |
From old datasheet system
10-Bit D-Type Latch
8-Bit LVTTL-GTLP Adjustable-Edge-Rate Registered Transceiver with Split LVTTL Port and Feedback Path 48-TVSOP -40 to 85
10-Bit Transparent Latch with 3-STATE Outputs ACT SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
Fairchild Semiconductor, Corp.
|
| 74ACT823 74ACT823SC 74ACT823SPC 74ACT823MTC 74ACT8 |
9-Bit D-Type Flip-Flop
Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable Polarity 20-SOIC -40 to 85
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
|
| 74ACT825 74ACT825SPC 74ACT825MTC 74ACT825SC 74ACT8 |
8-Bit D-Type Flip-Flop
8-Bit LVTTL-GTLP Adjustable-Edge-Rate Registered Transceiver with Split LVTTL Port and Feedback Path 48-TSSOP -40 to 85
Octal D-Type Flip-Flop
Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable Polarity 20-TSSOP -40 to 85
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
|
