PART |
Description |
Maker |
74ALS112AD 74ALS112AN 74ALS112 74ALS112A |
Dual J-K negative edge-triggered flip-flop
|
NXP Semiconductors PHILIPS[Philips Semiconductors]
|
HD74LS107A HD74LS107AFPEL HD74LS107AP |
Dual J-K Negative-edge-triggered Flip-Flops (with Clear)
|
Renesas Electronics Corporation
|
SN54LS113A SN74LS113A |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP JK负边沿触发器
|
Motorola Mobility Holdings, Inc. MOTOROLA[Motorola, Inc]
|
PO74G112ATR PO74G112ATU PO74G112ASU PO74G112ASR |
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
|
Potato Semiconductor Corporation
|
SN54_74LS113A ON2810 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP From old datasheet system
|
ON Semi
|
SN54_74LS73A ON2951 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP From old datasheet system
|
ON Semi
|
74LS112 DM74LS112A DM74LS112AN DM74KS112AM |
From old datasheet system Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset/ Clear/ and Complementary Outputs
|
FAIRCHILD[Fairchild Semiconductor]
|
IDT74LVC112A 74LVC112A_DS_87847 |
3.3V CMOS DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP From old datasheet system
|
IDT
|
LT1033 LT1033C LT1033CK LT1033M LT1033MK |
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SO 0 to 70 3A. Negative Adjustable Regulator 3A, Negative Adjustable Regulator From old datasheet system
|
Linear Technology Corporation LINER[Linear Technology]
|
74LCX112MTC |
Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
|
ON Semiconductor
|
DM74S112 74S112 |
From old datasheet system Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
|
Fairchild Semiconductor
|
HD74AC393 HD74AC393FP |
AC SERIES, ASYN NEGATIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO14 Dual Modulo-16-Counter
|
HITACHI[Hitachi Semiconductor] Hitachi,Ltd.
|