| PART |
Description |
Maker |
| 74ALS564AD 74ALS563A 74ALS563AD 74ALS564AN 74ALS56 |
Latch flip/flop
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors
|
| 74ALS374N |
Latch/flip-flop
|
Philips
|
| 74ALS373 74ALS373D 74ALS373DB 74ALS373N 74ALS374D |
Latch/flip-flop
|
NXP Semiconductors
PHILIPS[Philips Semiconductors]
|
| MM74HCT574 MM74HCT573 MM74HCT573MTC MM74HCT573N MM |
Octal D-Type Latch • 3-STATE Octal D-Type Flip-Flop
Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop
Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop
|
FAIRCHILD[Fairchild Semiconductor]
|
| CD4013BMS CD4013BE CD4013 FN3080 |
D-Type Flip Flop, Dual, Rad-Hard, CMOS, Logic
From old datasheet system
CMOS Dual ‘D’-Type Flip-Flop
CMOS Dual ??Type Flip-Flop
IC-4000CMOS
CMOS Dual D-Type Flip-Flop
CMOS Dual ‘D?Type Flip-Flop
|
INTERSIL[Intersil Corporation]
|
| 74LVT273 74LVT273PWDH 74LVT273D 74LVT273DB 74LVT27 |
3.3V Octal D flip-flop LVT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
From old datasheet system
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| 74VHC273MTC 74VHC273N 74VHC273SJ 74VHC273 74VHC273 |
Octal D-Type Flip-Flop AHC/VHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| MC10H109FNR2 MC10H131 MC100EP140 MC100E155FN MC100 |
Dual 4-5-Input OR/NOR Gate
Dual Type D Master-Slave Flip-Flop
3.3V ECL Phase-Frequency Detector
5V ECL 6-Bit 2:1 Mux Latch
5V ECL Differential Data and Clock D Flip-Flop
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
ECL/TTL Clock Driver
3.3V / 5V 2-Input Differential AND/NAND
5V ECL 2:1 Multiplexer
3.3V / 5V ECL JK Flip Flop
3.3V ECL 1:4 ÷ 1/÷ 2 Clock Fanout Buffer
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
Dual 2-Bit Adder/Subtractor
|
ON Semiconductor
|
| MC74HCT273 MC74HCT273A ON1520 MC74HCT273AN HCT273 |
Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs HCT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
From old datasheet system
|
Motorola Mobility Holdings, Inc.
Motorola, Inc.
MOTOROLA[Motorola, Inc]
|
| MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
