| PART |
Description |
Maker |
| 74AUP2G80GN 74AUP2G80GD |
Low-power dual D-type flip-flop; positive-edge trigger AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger 低功耗双D型触发器;上升沿触
|
NXP Semiconductors N.V.
|
| MC74HC273AN MC74HC273ADTR2 MC74HC273ADT MC74HC273 |
Octal D-Type Flip-Flop
OCTAL D FLIP FLOP WITH COMMON CLOCK AND RESET HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
|
ON Semiconductor
ONSEMI
|
| 74AUP2G80GT 74AUP2G80GM 74AUP2G80DC 74AUP2G80 74AU |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7" AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
|
| MC74HC109 ON1335 |
Dual J-K Flip-Flop with Set and Rest
From old datasheet system
DUAL J-K FLIP-FLOP WITH SET AND RESET
|
Motorola, Inc
ON Semi
|
| MC10H131FNG MC10H131FN MC10H13106 MC10H135FNG MC10 |
Dual D Type Master?Slave Flip?Flop
Dual D Type Master−Slave Flip−Flop
Dual J?K Master?Slave Flip?Flop
Universal Hexadecimal Counter
Four?Bit Universal Shift Register
Quad 2?Input Multiplexer (Non?Inverting)
12?Bit Parity Generator?Checker
Binary to 1?8 Decoder (Low)
Binary to 1?8 Decoder (High)
8?Line Multiplexer
8?Input Priority Encoder
5?Bit Magnitude Comparator
Dual Binary to 1?4?Decoder (High)
|
ONSEMI[ON Semiconductor]
|
| MC74F112 MC74F112D MC74F112J MC74F112N ON1232 |
1.2 to 5.5 V 10-A, 12-V Input Non-Isolated Wide-Adjust Module 10-DIP MODULE -40 to 85 F/FAST SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP 双JK负边沿触发器
From old datasheet system
|
Motorola Mobility Holdings, Inc.
MOTOROLA[Motorola, Inc]
|
| MC74ACT112D MC74ACT112N MC74ACT112 ON1165 MC74AC11 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
From old datasheet system
|
Motorola Mobility Holdings, Inc.
Motorola, Inc
ON Semi
|
| DM74ALS109A DM74ALS109AN DM74ALS109AM DM74ALS109AM |
From old datasheet system
ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Dual J-K Positive-Edge-Triggered Flip-Flop with Preset and Clear(???杈圭?瑙????-K瑙?????甯??缃??娓??绔?伎
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
|
| HCTS109HMSR HCTS109KMSR HCTS109K HCTS109D HCTS109D |
Dual Positive-Edge-Triggered D-Type- Flip-Flops With Clear And Preset 14-CDIP -55 to 125 辐射加固双JK触发器拖
Radiation Hardened Dual JK Flip Flop
From old datasheet system
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| 74LCX74M 74LCX74 |
LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUTS
DualD-TypeFlip-Flop
|
STMicroelectronics
|
| 74VHC74MTC 74VHC74MX 74VHC74SJ 74VHC74 74VHC74M 74 |
Dual D-Type Flip-Flop with Preset and Clear
Hex Schmitt-Trigger Inverters 14-TSSOP -40 to 85
Quadruple 2-Line To 1-Line Data Selectors/Multiplexers 16-SOIC -40 to 85 AHC/VHC/H/U/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
Quadruple 2-Line To 1-Line Data Selectors/Multiplexers 16-SOIC -40 to 85 AHC/VHC/H/U/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
Fairchild Semiconductor, Corp.
|
