| PART |
Description |
Maker |
| 1514 1514-22.5Y 1514-135Y 1514-2.5A 1514-130D 1514 |
Delay 50 /-2.5 ns, fixed SIP delay line Td/Tr=5
Delay 60 /-3 ns, fixed SIP delay line Td/Tr=5
Delay 45 /-2.3 ns, fixed SIP delay line Td/Tr=5
Delay 40 /-2 ns, fixed SIP delay line Td/Tr=5
Delay 270 /-13.5 ns, fixed SIP delay line Td/Tr=5
Delay 25 /-1.3 ns, fixed SIP delay line Td/Tr=5
Delay 170 /-8.5 ns, fixed SIP delay line Td/Tr=5
Delay 120 /-6 ns, fixed SIP delay line Td/Tr=5
Delay 10 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 90 /-4.5 ns, fixed SIP delay line Td/Tr=5
Delay 70 /-3.5 ns, fixed SIP delay line Td/Tr=5
Delay 130 /-6.5 ns, fixed SIP delay line Td/Tr=5
Delay 135 /-6.8 ns, fixed SIP delay line Td/Tr=5
PASSIVE DELAY LINE, TRUE OUTPUT, PSIP4
Fixed passive SIP delay line
Delay 2.5 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 3.5 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 100 /-5 ns, fixed SIP delay line Td/Tr=5
Delay 105 /-5.3 ns, fixed SIP delay line Td/Tr=5
Delay 140 /-7 ns, fixed SIP delay line Td/Tr=5
Delay 150 /-7.5 ns, fixed SIP delay line Td/Tr=5
Delay 15 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 20 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 22.5 /-1.2 ns, fixed SIP delay line Td/Tr=5
Delay 30 /-1.5 ns, fixed SIP delay line Td/Tr=5
Delay 37.5 /-1.9 ns, fixed SIP delay line Td/Tr=5
Delay 80 /-4 ns, fixed SIP delay line Td/Tr=5
Delay 7.5 /-1 ns, fixed SIP delay line Td/Tr=5
|
DATA DELAY DEVICES INC
|
| UPD424280LLE-A80 UPD424280LLE-A70 UPD424280AG5M-80 |
x18 Fast Page Mode DRAM
Quad PLL Clock Generator with Serial Interface (I2C)
Low-Cost 3.3V Spread Aware™ Zero Delay Buffer
MediaClock™ MPEG Clock Generator with VCXO
MediaClock™ PDP Clock Generator
Field and Factory-Programmable Spread Spectrum Clock Generator for EMI Reduction
HOTLink II™ SMPTE Receiver Training Clock
3.3V Zero Delay Buffer x18快速页面模式的DRAM
|
|
| UPD424263LLE-A80 UPD424263LLE-A70 UPD424263LG5M-A6 |
20-output, 200-MHz Zero Delay Buffer
16 Kbit (2K x 8) nvSRAM
3.3V Zero Delay Buffer
x16 Fast Page Mode DRAM
Three-PLL General-Purpose EPROM Programmable Clock Generator
Phase-Aligned Clock Multiplier x16快速页面模式的DRAM
|
Cooper Hand Tools
|
| NB6L295MNG NB6L295MNTXG |
LVPECL Dual Programmable Delay ACTIVE DELAY LINE, COMPLEMENTARY OUTPUT, QCC24
2.5V / 3.3V Dual Channel Programmable Clock/Data Delay with Differential LVPECL Outputs
|
ON Semiconductor
|
| ASM5I23S08AG-4-16-SR ASM5P23S08AG-4-16-SR ASM5I23S |
23S SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
3.3V ‘SpreadTrak?/a> Zero Delay Buffer
3.3V ‘SpreadTrak Zero Delay Buffer
3.3V 隆庐SpreadTrak隆炉 Zero Delay Buffer
|
PulseCore Semiconductor
|
| 1505 1505-50B 1505-50G 1505-5B 1505-50A 1505-50C 1 |
Delay 300 /-15 ns, 5-TAP SIP delay line Td/Tr=3
Delay 100 /-5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 60 /-3 ns, 5-TAP SIP delay line Td/Tr=3
Delay 30 /-2 ns, 5-TAP SIP delay line Td/Tr=3
Fixed 5-tap passive SIP delay line
PASSIVE DELAY LINE, TRUE OUTPUT, PSIP7
Delay 70 /-3.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 75 /-3.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 90 /-5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 40 /-2.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 50 /-3 ns, 5-TAP SIP delay line Td/Tr=3
Delay 20 /-1.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 200 /-10 ns, 5-TAP SIP delay line Td/Tr=3
Delay 5 /-1 ns, 5-TAP SIP delay line Td/Tr=3
|
DATA DELAY DEVICES INC
|
| CY23FS08-04 CY23FS08OXI-04 CY23FS08OXI-04T |
133 MHz, OTHER CLOCK GENERATOR, PDSO28 5.30 MM, LEAD FREE, SSOP-28
FailSafe⑩ 1.8V Zero Delay Buffer
FailSafe 1.8V Zero Delay Buffer
|
Cypress Semiconductor, Corp.
|
| IDT230507 IDT2305 IDT2305-1DCG IDT2305-1DCGI IDT23 |
2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
3.3V ZERO DELAY CLOCK BUFFER
|
INTEGRATED DEVICE TECHNOLOGY INC
|
| CY23S08SXC-2HT CY23S08SI-1HT CY23S08SI-2T CY23S08S |
23S SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 0.150 INCH, MS-012, SOIC-16
3.3V Zero Delay Buffer
3.3V Zero Delay Buffer
|
CYPRESS SEMICONDUCTOR CORP
Cypress Semiconductor, Corp.
http://
|
| CY23020-1 CY23020LFI-1T CY23020ZC-1 CY23020ZC-1T C |
20-output, 200-MHz Zero Delay Buffer 23020 SERIES, PLL BASED CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC48
Clocks and Buffers : Clock Distribution
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| 2305B-1HPGG 2305B-1HPGGI 2305B-1DCG 2305B-1DCGI 23 |
3.3V ZERO DELAY CLOCK BUFFER
|
Integrated Device Technology
http://
|
| IDT2305B |
3.3V ZERO DELAY CLOCK BUFFER
|
IDT
|
