| PART |
Description |
Maker |
| DS3832C-311 |
From old datasheet system
3.3V, 32Mb Advanced NV SRAM with Clock
3.3V/ 32Mb Advanced NV SRAM with Clock
|
MAXIM - Dallas Semiconductor
DALLAS[Dallas Semiconductor]
Dallas Semiconducotr
|
| CY7C1316BV18 CY7C1318BV18 CY7C1916BV18 CY7C1320BV1 |
18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst结构,18-Mbit DDR-II SRAM) 18兆位的DDR - II SRAM字突发架构（2字突发结18 -兆位的DDR - II SRAM的）
18-Mbit DDR-II SRAM 2-Word Burst Architecture(2瀛?urst缁??,18-Mbit DDR-II SRAM)
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| K4H560838E-TC/LB0 K4H560838E-TC/LA2 K4H560838E-TC/ |
DDR SDRAM 256Mb E-die (x4, x8) 256Mb的DDR SDRAM的电子芯片（了x4，x8
Quad Wide Bandwidth High Output Drive Single Supply Op Amp 16-PDIP -40 to 125
256Mb E-die DDR SDRAM Specification 66 TSOP-II
Dual Micropower Precision Low-Voltage Operational Amplifier 8-SOIC -55 to 125
10-Bit, 32 kSPS ADC Serial Out, uProcessor Periph./Standalone, 11 Ch. 20-PLCC
10-Bit, 32 kSPS ADC Serial Out, uProcessor Periph./Standalone, 11 Ch. 20-PDIP
DDR SDRAM 256Mb E-die (x4, x8)
|
Samsung Semiconductor Co., Ltd.
SAMSUNG SEMICONDUCTOR CO. LTD.
|
| W9832AASA 9832AASA |
32MB (4M x 64) SDRAM SO-DIMM MODULE(32MB (4M x 64)小型双列直插同步动态RAM模块)
From old datasheet system
|
Winbond Electronics Corp
|
| CY7C1427AV18-250BZI |
36-Mbit DDR-II SRAM 2-Word Burst Architecture 4M X 9 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| AT45BR3214B |
32MB DataFlash 4MB SRAM Stack Memory.
|
Atmel
|
| M390S3320BT1 |
32MB x 72 SDRAM DIMM with PLL & Register based on 32MB x 4, 4Banks, 4KB Refresh, 3.3V Synchronous DRAMs with SPD Serial Presence Detect
|
Samsung Electronic
|
| CXK77K18R320GB CXK77K18R320GB-3 CXK77K18R320GB-33 |
32Mb LW R-R HSTL High Speed Synchronous SRAM (2Mb x 18)
|
Sony Corporation
|
| HM66AEB18202 HM66AEB36102BP-40 HM66AEB18202BP-30 H |
Memory>Fast SRAM>QDR SRAM
36-Mbit DDR II SRAM 2-word Burst
|
Renesas Technology / Hitachi Semiconductor
|
| CY7C1568KV18-500BZXC CY7C1568KV18-500BZC CY7C1570K |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
